Dual-Rail CMOS Power Architecture for Voltage-Level Flexibility

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Solution Overview

Problem

The use of a single power source in integrated circuit (IC) devices makes it difficult to control power consumption, as conventional blocks need to be designed and separated based on voltage levels.

Innovation Solution

An integrated circuit device with dual power sources, including a front-side (FS) power source and a back-side (BS) power source, both coupled to the same transistor, allowing for independent activation and deactivation based on power consumption needs.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Device complexity

If a single power source is used in IC devices, then the device structure is simple, but power consumption control is difficult

Engineering Contradiction:
Improvepower source configurationVSAvoidpower consumption control
Core Design Contradiction:
Device complexityVSUse of energy by moving object

Solution Approach 1:

The power distribution network is segmented into front-side power sources (VDD1, VDD2) and back-side power sources (VSS1, VSS2), allowing independent control of power supply paths. This segmentation enables selective activation of power sources based on operational requirements, thereby achieving fine-grained power consumption control without excessive overall complexity.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent implements dynamic power management by enabling the controller to selectively activate or deactivate specific power sources (VDD1, VDD2, VSS1, VSS2) based on real-time operational conditions. This dynamic adjustment allows the system to optimize power consumption by activating only the necessary power paths during different operational modes.

Inventive Principle:
Principle #15Dynamics

2Use of energy by moving object

If conventional blocks are separated based on voltage levels, then power consumption control is improved, but device complexity increases

Engineering Contradiction:
Improvepower consumption controlVSAvoidblock design and separation
Core Design Contradiction:
Use of energy by moving objectVSDevice complexity

Solution Approach 1:

The patent creates a universal power distribution architecture where a single integrated circuit block can simultaneously support multiple voltage levels (VDD1 and VDD2) through its dual power source configuration. This multi-functional power network eliminates the need for separate high-voltage and low-voltage blocks, allowing one block to serve multiple functions across different voltage domains.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Solution Approach 2:

The invention changes the power supply parameters by introducing multiple voltage levels (VDD1, VDD2) and multiple ground references (VSS1, VSS2) that can be independently controlled. This parameter diversification allows the same circuit block to operate at different voltage levels based on operational requirements, eliminating the need for voltage-level-specific block separation.

Inventive Principle:
Principle #35Parameter changes

3Use of energy by moving object

If dual power sources are used, then power consumption control is improved, but device complexity increases

Engineering Contradiction:
Improvepower consumption controlVSAvoidpower source configuration
Core Design Contradiction:
Use of energy by moving objectVSDevice complexity

Solution Approach 1:

The patent merges front-side power sources (VDD1, VDD2) and back-side power sources (VSS1, VSS2) into a unified power distribution network that supplies a single integrated circuit block. This merging approach consolidates multiple power paths into one coherent system, achieving fine-grained power control without proportionally increasing overall device complexity.

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The substrate serves as an intermediary structure that carries back-side power sources (VSS1, VSS2) and connects them to the integrated circuit block. This intermediary substrate implementation allows complex dual power source configuration to be managed through a structured intermediate layer, reducing the apparent complexity at the block level while maintaining fine-grained power control capabilities.

Inventive Principle:
Principle #24Intermediary (Mediator)

Data Source

PatentEP4546419A1Integrated circuit devices having dual power sources
Publication Date: 2025.04.30 SAMSUNG ELECTRONICS CO LTD
  • EP4546419A1 patent drawingFigure 1
  • EP4546419A1 patent drawingFigure 2
  • EP4546419A1 patent drawingFigure 3

AI summary

CMOS devices are provided. A CMOS device includes a PMOS transistor (T-P) and an NMOS transistor (T-N). Moreover, the CMOS device includes a dual power rail having a front-side power rail (FSR) and a back-side power rail (BSR) that are both coupled to one of the PMOS transistor (T-P) or the NMOS transistor (T-N). The PMOS transistor (T-P) and the NMOS transistor (T-N) are in a vertical transistor stack, or are side-by-side.