Dual-Rate Digital Power Amplifier for Alias Tone Suppression
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Solution Overview
Problem
Existing digital power amplifiers face challenges in reducing out-of-band alias tones while maintaining power efficiency, as they often require increasing the sampling rate to minimize quantization noise, which leads to higher power consumption and spectral purity issues.
Innovation Solution
A digital power amplification circuit with a main and auxiliary digital power amplifier operating at different clock rates, where the auxiliary amplifier receives a stream of digital codes derived from the original stream by computing a difference and is upsampled to a higher clock rate, allowing for reduced out-of-band spectral emissions by summing the outputs of both amplifiers.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If the sampling rate is increased to reduce quantization noise and out-of-band alias tones, then spectral purity is improved, but power consumption increases
Solution Approach 1:
The patent divides the digital power amplifier into two separate amplifiers: a main DPA operating at a lower clock rate (first clock rate) and an auxiliary DPA operating at a higher clock rate (second clock rate). The main DPA handles the bulk of the amplification task at lower power consumption, while the auxiliary DPA processes a derived stream of digital codes at the higher clock rate to suppress out-of-band alias tones. This segmentation allows the system to achieve high spectral purity without requiring the entire system to operate at the higher clock rate, thus reducing overall power consumption.
2Object-generated harmful factors
If a single digital power amplifier operates at high clock rate to reduce alias tones, then out-of-band spectral emissions are reduced, but device complexity and power consumption increase
Solution Approach 1:
The patent segments the amplifier structure into two functional units: a main DPA and an auxiliary DPA, each with distinct clock rates and processing roles. This segmentation reduces the complexity burden on any single amplifier while achieving the overall goal of suppressing out-of-band emissions.
Solution Approach 2:
The patent introduces an intermediary decoding block that receives a stream of digital codes and derives a second stream of digital codes from it. This decoding block acts as a mediator that prepares the signal for the auxiliary DPA, enabling the auxiliary amplifier to process only the necessary correction information rather than the full signal, thus reducing complexity.
3Measurement precision
If the sampling rate is increased to spread quantization noise over wider bandwidth, then quantization noise density is reduced, but power consumption increases
Solution Approach 1:
The patent applies segmentation by assigning different sampling rates to different functional blocks. The main DPA operates at a lower clock rate where high noise density is acceptable, while the auxiliary DPA operates at a higher clock rate specifically to process and suppress out-of-band quantization noise and alias tones. This segmented approach achieves low noise density in critical bands without requiring the entire system to consume the power associated with high-rate operation.
Data Source
AI summary
A digital power amplification circuit includes a decoding block configured to receive a first stream of digital codes and to derive from the first stream a second stream of digital codes, the decoding block including a decoder configured to decode the digital codes of the first stream and the second stream at a first clock rate, a main digital power amplifier configured to receive the decoded digital codes of the first stream, an upsampler configured to upsample the decoded digital codes of the second stream to a second clock rate that is greater than the first clock rate, an auxiliary digital power amplifier configured to receive the decoded digital codes of the second stream upsampled to the second clock rate, and a summer configured to sum (i) a main output signal of the main digital power amplifier and (ii) an auxiliary output signal of the auxiliary digital power amplifier.