Dual-Reference Oscillator Circuit for Low Phase Noise Accuracy

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Solution Overview

Problem

Current oscillation signal generation technologies face challenges in achieving high frequency accuracy and low phase noise while maintaining low power consumption, especially as communication standards become more stringent.

Innovation Solution

The proposed solution involves using a combination of high-frequency and high-quality reference oscillators, along with a Phase-Locked Loop (PLL) and dithering techniques, to generate oscillation signals with reduced phase noise and spurs, utilizing high Q resonators and digital phase shifter circuits to achieve high frequency accuracy and low power consumption.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Measurement precision

If a single high-frequency oscillator is used to achieve high frequency accuracy, then frequency accuracy is improved, but phase noise increases

Engineering Contradiction:
Improvefrequency accuracyVSAvoidphase noise
Core Design Contradiction:
Measurement precisionVSObject-generated harmful factors

Solution Approach 1:

The oscillator system is segmented into two separate oscillators: a first oscillator optimized for frequency accuracy and a second oscillator optimized for low phase noise. Each oscillator independently provides its strength without compromising the other, resolving the contradiction between frequency accuracy and phase noise.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

Different parts of the oscillation signal generation are assigned different quality characteristics. The first oscillator provides high frequency accuracy while the second oscillator provides low phase noise. The processing circuit then combines these different qualities to produce a signal that benefits from both characteristics.

Inventive Principle:
Principle #3Local quality

2Object-generated harmful factors

If high Q resonators and dual oscillator architecture are used to reduce phase noise, then phase noise is improved, but device complexity increases

Engineering Contradiction:
Improvephase noiseVSAvoidoscillator architecture
Core Design Contradiction:
Object-generated harmful factorsVSDevice complexity

Solution Approach 1:

The processing circuit merges the outputs of two oscillators with different characteristics into a single combined reference oscillation signal. This combining approach allows the system to achieve low phase noise while managing complexity through systematic signal integration rather than requiring a completely new complex oscillator design.

Inventive Principle:
Principle #5Merging (Combining)

3Object-generated harmful factors

If advanced oscillation signal generation techniques are used to meet stringent phase noise requirements, then phase noise is improved, but power consumption increases

Engineering Contradiction:
Improvephase noiseVSAvoidpower consumption
Core Design Contradiction:
Object-generated harmful factorsVSUse of energy by moving object

Solution Approach 1:

The system applies partial action by using two oscillators only where needed - the first oscillator runs at a lower frequency with high accuracy, and the second oscillator runs at a higher frequency with low phase noise. The processing circuit combines these partially, achieving the required performance only in the critical frequency range while conserving power elsewhere.

Inventive Principle:
Principle #16Partial or excessive action

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach enables the generation of oscillation signals with very low phase noise and reduced spurs at low power consumption, suitable for advanced communication standards, improving system performance and compliance with regulatory requirements.

Implementation Method 1

a phase-locked loop configured to generate the oscillation signal based on the third reference oscillation signal, wherein a frequency of the oscillation signal is a multiple of a frequency of the third reference oscillation signal

Methodology Applied
Scientific EffectPhase-locked loop frequency multiplication:

Implementation Method 2

utilizing high Q resonators to achieve high frequency accuracy and low power consumption

Methodology Applied
Scientific EffectResonance: Resonance

Data Source

PatentUS11283456B2Apparatuses for generating an oscillation signal
Publication Date: 2022.03.22 INTEL CORP
  • US11283456B2 patent drawing
  • US11283456B2 patent drawing
  • US11283456B2 patent drawing

AI summary

An apparatus for generating an oscillation signal is provided. The apparatus includes a first oscillator configured to generate a first reference oscillation signal, and a second oscillator configured to generate a second reference oscillation signal. A frequency accuracy of the first oscillator is higher than a frequency accuracy of the second oscillator. Further, an oscillator phase noise of the second oscillator is lower than an oscillator phase noise of the first oscillator. The apparatus further includes a processing circuit configured to generate a third reference oscillation signal based on the first reference oscillation signal and the second reference oscillation signal. Additionally, the apparatus includes a phase-locked loop configured to generate the oscillation signal based on the third reference oscillation signal. A frequency of the oscillation signal is a multiple of a frequency of the third reference oscillation signal.