Dual-Resolution ADC Circuit for Differential and Common-Mode Signals
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Solution Overview
Problem
Analog to digital converters (ADCs) in time-of-flight (TOF) systems require significant power and area, especially as resolution increases, due to the need for high resolution in both differential and common mode signals, leading to inefficiencies in power and space usage.
Innovation Solution
The implementation of a circuit design that uses two ADCs with different resolutions, where one ADC generates a high-resolution differential signal and the other generates a low-resolution common mode signal, along with a comparator-based approach to generate the common mode signal during the differential phase, reducing power and area requirements.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If high resolution ADCs are used for both differential and common mode signals, then measurement precision is improved, but power consumption increases proportionately
Solution Approach 1:
The patent divides the ADC functionality into two separate converters: a first ADC dedicated to differential signals and a second ADC dedicated to common mode signals. This segmentation allows each ADC to be optimized for its specific signal type, enabling the use of lower-resolution (and thus lower power) ADCs while maintaining overall system precision requirements.
Solution Approach 2:
The patent applies different resolution characteristics to different signal paths based on their specific requirements. The differential signal path uses higher resolution ADC conversion, while the common mode signal path uses lower resolution conversion, matching the local quality needs of each signal type rather than applying uniform high resolution across all paths.
2Measurement precision
If high resolution ADCs are used for both differential and common mode signals, then measurement precision is improved, but area consumption increases proportionately
Solution Approach 1:
The patent divides the ADC functionality into two separate converters: a first ADC dedicated to differential signals and a second ADC dedicated to common mode signals. This segmentation allows each ADC to be optimized for its specific signal type, enabling the use of lower-resolution (and thus lower power) ADCs while maintaining overall system precision requirements.
Solution Approach 2:
The patent applies different resolution characteristics to different signal paths based on their specific requirements. The differential signal path uses higher resolution ADC conversion, while the common mode signal path uses lower resolution conversion, matching the local quality needs of each signal type rather than applying uniform high resolution across all paths.
3Adaptability or versatility
If multiple high resolution ADCs are used in the TOF system, then signal conversion capability is improved, but power consumption increases significantly
Solution Approach 1:
The patent divides the ADC functionality into two separate converters: a first ADC dedicated to differential signals and a second ADC dedicated to common mode signals. This segmentation allows each ADC to be optimized for its specific signal type, enabling the use of lower-resolution (and thus lower power) ADCs while maintaining overall system precision requirements.
Data Source
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AI summary
In described examples, a circuit (300) includes a first analog to digital converter (ADC) (306) that generates a coarse output in response to a first input (302) and a second input (304). The first ADC (306) generates the coarse output in a differential phase. A pipeline ADC (320) generates a differential signal (330) in response to the coarse output, the first input (302) and the second input (304). The pipeline ADC (320) generates the differential signal (330) in a common-mode phase. The first ADC (306) generates a common mode signal (310) in the common-mode phase.