Dual Resolution Display Control Circuit Preventing Charge Accumulation

Resolve Bottlenecks,
Find Innovative Solutions
Generate Solutions

Solution Overview

Problem

Conventional display panel control systems face issues with dual resolution support and scan direction, leading to errant operations due to unused shift registers accumulating charges in low resolution mode, causing abnormalities.

Innovation Solution

A dual resolution control circuit comprising four shift registers, four logic gates, and a switching network that directs shifting signals to ensure all registers are utilized, preventing charge accumulation by generating non-overlapping panel control signals in low resolution mode, regardless of scan direction.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Adaptability or versatility

If the display panel operates in low resolution mode with conventional control circuits, then the resolution is reduced, but unused shift registers accumulate charges causing errant operations

Engineering Contradiction:
Improvedual resolution supportVSAvoidoperational stability
Core Design Contradiction:
Adaptability or versatilityVSReliability

Solution Approach 1:

The patent ensures continuous useful action by making all shift registers productive in low resolution mode. The control circuit generates overlapping shifting signals that are fed to multiple shift registers simultaneously, ensuring that every shift register has a defined function and outputs valid signals throughout the entire operating cycle, eliminating idle registers and preventing charge accumulation.

Inventive Principle:
Principle #20Continuity of useful action

Solution Approach 2:

The patent merges the functions of multiple shift registers by having them operate in parallel with overlapping signals. In low resolution mode, the control circuit combines signals from multiple shift registers to drive the display, ensuring that all registers are actively contributing to the output rather than sitting idle. This merging approach maintains reliability while supporting dual resolution operation.

Inventive Principle:
Principle #5Merging (Combining)

2Device complexity

If shift registers are left unused in low resolution mode, then device complexity is reduced, but charge accumulation causes abnormalities

Engineering Contradiction:
Improvecontrol circuit configurationVSAvoidcharge accumulation
Core Design Contradiction:
Device complexityVSObject-affected harmful factors

Solution Approach 1:

The control circuit maintains continuous useful action in all shift registers by providing overlapping shifting signals that keep every register actively driving signals during low resolution mode. This eliminates idle registers and prevents charge accumulation without adding significant complexity to the control circuit configuration.

Inventive Principle:
Principle #20Continuity of useful action

3Adaptability or versatility

If panel control signals are synchronized into pairs for low resolution, then resolution is achieved, but interconnection adjustment increases complexity

Engineering Contradiction:
Improveresolution switchingVSAvoidswitching network configuration
Core Design Contradiction:
Adaptability or versatilityVSDevice complexity

Solution Approach 1:

The control circuit achieves universality by using the same shift registers and logic gates for both high and low resolution modes. The overlapping signal generation approach allows the circuit to function in multiple resolution configurations without requiring separate dedicated pathways or complex switching networks, simplifying the overall design while maintaining dual resolution capability.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Data Source

PatentUS7656381B2Systems for providing dual resolution control of display panels
Publication Date: 2010.02.02 INNOLUX CORP
  • US7656381B2 patent drawing
  • US7656381B2 patent drawing
  • US7656381B2 patent drawing

AI summary

Systems for providing dual resolution control of display panels are provided. A representative system incorporates two pairs of shift registers, each of the shift registers outputting a shifting signal; two pairs of logic gates; and a switching network coupled among the shifting registers and the logic gates. In a low resolution mode, the switching network causes the shift registers to output shifting signals, with corresponding pulses of the shifting signals of the shift registers of the first pair temporally overlapping with corresponding pulses of the shifting signals of the shift registers of the second pair; and wherein, responsive to the shifting signals, the logic gates output panel control signals, with corresponding pulses of the panel control signals of the logic gates of the first pair not temporally overlapping with corresponding pulses of the panel control signals of the logic gates of the second pair.