Dual Ring Oscillator Circuit for Rail-to-Rail Low-Power Clocks
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Solution Overview
Problem
Conventional low power clock generation solutions in low power applications suffer from high power consumption, small voltage swing, and slow rising/falling edges, leading to inefficiencies and additional requirements in subsequent CMOS logic, such as level-shifting and edge restoration.
Innovation Solution
A low power controllable oscillator with rail-to-rail output, utilizing DC-shifted ring oscillators, amplification, and buffering to generate a rail-to-rail oscillating signal with fast transitions, minimizing power consumption by reducing shot-through current in digital gates.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Use of energy by moving object
If conventional low bias current generation circuits are used, then power consumption is reduced, but voltage swing becomes too small
Solution Approach 1:
The oscillator is divided into two separate ring oscillators (first and second) operating at different voltage levels. The first ring oscillator generates a signal swinging between VDD and an intermediate voltage, while the second generates a signal swinging between the intermediate voltage and ground. This segmentation allows each oscillator to operate with appropriate bias conditions for low power while collectively achieving full rail-to-rail output swing.
Solution Approach 2:
An intermediate voltage node is introduced between the two ring oscillators to serve as a mediator. This intermediate node allows the first and second oscillators to be coupled without direct conflict, enabling each to operate independently at optimized bias points while their combined output achieves the full voltage range from VDD to ground.
2Use of energy by moving object
If conventional low bias current generation circuits are used, then power consumption is reduced, but rising/falling edges become too slow
Solution Approach 1:
The patent combines the outputs of two ring oscillators with complementary phase relationships. By merging these signals through the intermediate node, the circuit achieves fast edge transitions because one oscillator's rising edge complements the other's falling edge, and vice versa. This merging effect produces sharp transitions without requiring high bias currents in a single oscillator.
Solution Approach 2:
The two ring oscillators operate in a periodic complementary fashion, where one oscillator is transitioning while the other provides the complementary signal. This periodic coordination between the two oscillators ensures that fast edges are generated at the appropriate times without requiring continuous high power consumption.
3Use of energy by moving object
If slow clock signals are generated, then power consumption is reduced, but shot-through current in subsequent CMOS logic increases
Solution Approach 1:
The circuit performs preliminary action by pre-shaping the clock signal edges through the dual ring oscillator structure before the signal reaches subsequent CMOS logic gates. The complementary oscillators generate pre-conditioned signals with appropriate rise and fall times, preventing excessive shot-through current in downstream logic while maintaining overall low power consumption.
Data Source
AI summary
A controllable oscillator including an upper oscillator coupled between an upper supply voltage and an upper intermediate node that provides at least one upper oscillating signal on at least one upper oscillating node, a lower oscillator coupled between a lower intermediate node and a lower supply voltage that provides at least one lower oscillating signal on at least one lower oscillating node, an oscillation controller coupled between the upper and lower intermediate nodes, and amplification circuitry coupled between the upper and lower supply voltages, having at least one upper input coupled to the at least one upper oscillating node, having at least one lower input coupled to the at least one lower oscillating node, and having a primary output node for providing a primary rail-to-rail oscillation signal. A coupling circuit may be coupled between one or more upper and lower oscillating nodes for synchronization.