Dual Sample-and-Hold Circuit for High-Speed Image Processing
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Solution Overview
Problem
Current image sensing devices face limitations in operating at high speeds due to circuit settling time and charge propagation, hindering the ability to capture high-speed scenes and playback data in smooth slow motion.
Innovation Solution
The implementation of dual sample-and-hold circuits and a voltage-to-current circuit with a resistor and current source, combined with a current-mode analog-to-digital converter, allows for high-speed operation by sampling and converting difference data between reset and light-exposed signals, enabling increased throughput and accuracy in image processing.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Speed
If conventional single sample-and-hold circuit is used, then circuit complexity is low, but operating speed is limited by circuit settling time and charge propagation
Solution Approach 1:
The patent divides the image sensor into multiple segments, with each segment having its own independent sample-and-hold circuit and ADC. This segmentation allows parallel processing of multiple pixels simultaneously, achieving 2X speed improvement while keeping each individual circuit segment relatively simple and manageable.
2Productivity
If conventional sampling method is used, then circuit design is simple, but throughput is limited and cannot capture high-speed scenes
Solution Approach 1:
The patent implements preliminary sampling of pixel signals before ADC conversion using dedicated sample-and-hold circuits. This preliminary action allows the circuits to settle and stabilize the signals in advance, enabling faster subsequent processing and increasing overall throughput without compromising accuracy.
Solution Approach 2:
The patent transitions from sequential single-pixel processing to parallel multi-pixel processing by adding spatial dimensionality. Multiple sample-and-hold circuits and ADCs operate simultaneously on different pixels, effectively moving from one-dimensional sequential processing to two-dimensional parallel processing architecture.
3Loss of time
If high frame rate operation is implemented, then smooth slow motion playback is enabled, but circuit settling time becomes insufficient
Solution Approach 1:
By segmenting the processing pipeline into multiple independent channels, each handling a subset of pixels, the patent allows each channel to complete its settling process within the reduced frame time. The parallel execution of multiple segments compensates for the shortened time available per segment, maintaining adequate settling time while achieving high frame rates.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This configuration achieves a 2X improvement in speed by processing multiple pixels in parallel, reducing pixel noise and enabling smooth high-speed image capture and playback, while also incorporating built-in correlated double sampling and analog gain capabilities.
Implementation Method 1
charge is collected in a photoelectric conversion device of the pixel circuit as a result of the impingement of light
Implementation Method 2
a voltage-to-current circuit including a resistor and a current source, and configured to receive the first data and the second data and output a difference data
Data Source
AI summary
An image processing circuit includes a first dual sample-and-hold circuit that samples a first data and a second data from a first pixel, a second dual sample-and-hold circuit that samples a third data and a fourth data from a second pixel, a voltage-to-current circuit including a resistor and a current source, that receives the first data and the second data to output a first difference data, and that receives the third data and the fourth data to output a second difference data; and an analog-to-digital converter that converts the first and second difference data from an analog form to a digital form.


