Dual Seal Ring Wafer Layout for Inter-Die Gap Utilization
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Solution Overview
Problem
Conventional semiconductor fabrication methods leave significant wasted space between IC dies on a wafer, which could be utilized to enhance functionality or versatility, but current methods do not efficiently utilize this space.
Innovation Solution
The implementation of interconnected IC dies with dual seal ring structures and conductive elements that electrically connect adjacent dies, along with the formation of various structures in the gap regions to improve chip area utilization and pattern uniformity, allowing for enhanced performance and functionality without increasing design and fabrication complexity.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Area of stationary object
If conventional fabrication methods are used, then manufacturing simplicity is maintained, but chip area utilization is low due to wasted space between dies
Solution Approach 1:
The patent merges previously separate functional areas by placing additional circuitry, memory structures, or functional blocks in the gap regions between adjacent IC dies. This combining of functions into previously wasted space directly increases chip area utilization without requiring a completely new fabrication approach.
Solution Approach 2:
The patent utilizes the two-dimensional gap regions between dies as an additional functional dimension. Instead of only expanding die size, the invention exploits the lateral space between dies to accommodate additional structures, effectively adding functional capacity in the dimensional space that was previously unused.
2Adaptability or versatility
If dual seal ring structures with conductive elements are implemented, then electrical interconnection between dies is achieved, but fabrication process complexity increases
Solution Approach 1:
The seal ring structures serve multiple functions: they provide mechanical sealing to protect the gap region structures from contamination, establish electrical connections between adjacent dies through integrated conductive elements, and define the boundaries of the inter-die functional regions. This multi-functionality reduces the need for separate components.
Solution Approach 2:
The seal ring structures act as intermediary elements between adjacent IC dies, providing both mechanical and electrical coupling. The conductive elements within or associated with the seal rings serve as mediators to establish electrical pathways across the gap regions without requiring direct die-to-die contact.
3Adaptability or versatility
If gap regions are utilized for additional structures, then functionality is enhanced, but manufacturing precision requirements increase
Solution Approach 1:
The patent applies different structural configurations and material properties specifically to the gap regions versus the die areas. The seal ring structures and conductive elements in the gaps have optimized local characteristics tailored to their interconnection function, while the dies maintain their standard high-precision circuit patterns. This localized differentiation allows functional enhancement without compromising overall manufacturing precision.
Data Source
AI summary
A first die includes a plurality of first transistors. A first seal ring surrounds the first die in a top view. A second die that a plurality of second transistors. A second seal ring surrounds the second die in the top view. A plurality of conductive elements extends into both the first die and the second die in the top view. The conductive elements electrically interconnect the first die with the second die. A third seal ring surrounds, in the top view, the first die, the second die, and the conductive elements.