Dual Sense Amplifier Memory Read Circuit Offset Compensation

Resolve Bottlenecks,
Find Innovative Solutions
Generate Solutions

Solution Overview

Problem

Current memory devices, such as MRAM, face challenges in accurately reading data due to variations in resistance states of magnetoresistive effect elements, leading to unreliable data retrieval and testing processes.

Innovation Solution

The memory device incorporates a read circuit with a first and second sense amplifier circuit, along with an external voltage supply circuit, which compares signals before and after writing reference data to determine the stored data, and utilizes external voltages to adjust and measure offset voltages for improved reliability in data reading and testing.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Device complexity

If a single sense amplifier circuit is used to read data from the memory cell, then the device complexity is reduced, but the measurement precision of resistance states deteriorates due to variations in magnetoresistive effect elements

Engineering Contradiction:
Improvestructure of sense amplifier circuitVSAvoidaccuracy of data reading
Core Design Contradiction:
Device complexityVSMeasurement precision

Solution Approach 1:

The patent divides the sense amplifier function into two separate circuits: a first sense amplifier circuit that reads data before reference data writing, and a second sense amplifier circuit that reads data after reference data writing. This segmentation allows each circuit to independently measure resistance states at different time points, improving measurement precision while maintaining manageable device complexity through modular architecture.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent introduces a reference data writing step before the actual data reading process. By writing reference data (e.g., '0') into the memory cell beforehand, the system establishes a known baseline state. The first sense amplifier then measures the initial state, and the second sense amplifier measures the state after reference data writing, enabling accurate determination of the original stored data through comparison. This preliminary action compensates for variations in magnetoresistive effect elements.

Inventive Principle:
Principle #10Preliminary action

2Reliability

If external voltage supply circuit is added to adjust offset voltages, then the reliability of data reading improves, but the device complexity increases

Engineering Contradiction:
Improveaccuracy of data retrievalVSAvoidstructure of voltage supply circuit
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent employs an external voltage supply circuit that provides adjustable voltage signals to the sense amplifier circuits. By changing the voltage parameters (e.g., applying different voltage levels to compensate for offset variations), the system can adjust the operating conditions of the sense amplifiers to account for variations in magnetoresistive effect elements. This parameter adjustment improves reading reliability without requiring complex internal compensation circuitry within the memory device itself.

Inventive Principle:
Principle #35Parameter changes

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This configuration enhances the reliability of data reading and testing by accurately distinguishing between resistance states, ensuring high accuracy and reliability in both operational and testing conditions.

Implementation Method 1

memory devices that store data by associating the data with the resistance state of a memory element... MRAM, ReRAM, and PCRAM, which are all variable resistance memory devices

Methodology Applied
Scientific EffectMagnetoresistance: Magnetoresistance

Data Source

PatentUS10755752B2Memory device that performs a read operation and a test operation
Publication Date: 2020.08.25 KIOXIA CORP
  • US10755752B2 patent drawing
  • US10755752B2 patent drawing
  • US10755752B2 patent drawing

AI summary

A memory device includes a first sense amplifier, and a second sense amplifier. During a read operation, a first signal based on a first output of the first sense amplifier corresponding to data stored in a memory cell before writing reference data therein and a second signal based on a second output of the first sense amplifier corresponding to data stored in the memory cell after writing reference data therein, are supplied to the second sense amplifier, which compares the first and second signals to output a comparison result representative of the data stored in the memory cell. During a test operation, a third signal based on the first output and a fourth signal based on an output from a voltage supply circuit are supplied to the second sense amplifier, which outputs a comparison result of the third and fourth signals as a test result.