Dual Sensitivity Image Sensor Virtual Ground Amplifier
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Solution Overview
Problem
Current CMOS image sensors face challenges in maintaining sensitivity while minimizing noise, as post-pixel amplification to boost sensitivity often degrades dynamic range and increases sensor noise, particularly under high gain settings and high frame rate applications.
Innovation Solution
A programmable pixel circuit for iSoC image sensors that supports dual-mode operation by replacing pixel sense capacitance with a switched capacitor integrator, allowing for high sensitivity mode with lower noise and maintaining optical fill factor, using a dual-gate transistor to minimize Miller capacitance and enhance sensitivity.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If post-pixel amplification is used to boost sensitivity, then sensitivity-based ISO speed is improved, but noise-based ISO speed degrades and dynamic range is reduced
Solution Approach 1:
Instead of amplifying the signal after pixel readout (post-pixel amplification), the patent inverts the approach by using a virtual ground amplifier that maintains the pixel floating diffusion at virtual ground potential during readout. This prevents noise amplification while still achieving high sensitivity through the amplifier's high gain capability, thereby improving sensitivity-based ISO speed without degrading noise-based ISO speed.
Solution Approach 2:
The patent introduces a virtual ground amplifier as an intermediary between the pixel array and the readout circuitry. This amplifier acts as a mediator that buffers the pixel signals, allowing high gain amplification without directly amplifying the noise from the pixel readout transistors. The virtual ground configuration isolates the pixel floating diffusion from the amplifier's noise, resolving the contradiction between sensitivity and noise.
2Measurement precision
If post-pixel amplification is used to boost sensitivity, then sensitivity-based ISO speed is improved, but dynamic range is degraded
Solution Approach 1:
The patent inverts the conventional readout approach by maintaining the pixel floating diffusion at virtual ground potential during signal readout rather than allowing it to swing to readout levels. This virtual ground technique allows the amplifier to operate at its optimal operating point with high gain, achieving high sensitivity without clipping or saturation that would limit dynamic range.
3Measurement precision
If high gain settings are used to improve sensitivity, then sensitivity-based ISO speed is improved, but temporal noise increases
Solution Approach 1:
The virtual ground amplifier serves as an intermediary that provides high gain amplification while isolating the pixel noise from the amplification process. By maintaining the pixel floating diffusion at virtual ground, the amplifier's high gain does not amplify the pixel's thermal noise and reset noise, thereby achieving high sensitivity without increasing temporal noise.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The dual-mode operation achieves higher sensitivity with reduced temporal noise, improving both sensitivity-based and noise-based ISO speeds, while maintaining low noise and dynamic range, thus enhancing imaging performance under various lighting conditions.
Implementation Method 1
a photodetector
Implementation Method 2
a correlated double sampling capacitor connected in series with the signal bus
Data Source
AI summary
A dual sensitivity image sensor provides a standard mode and a high- sensitivity mode of operation via iSoC integration. In addition to boosting sensitivity, the high sensitivity mode also reduces temporal noise thereby optimally boosting the Signal-to-Noise Ratio (SNR) of the image sensor. The circuit does not significantly increase pixel complexity and requires minimal changes to the support circuits in the iSoC including the addition of support and control circuitry to facilitate seamless mode change.


