Dual Shift Register Gate Driver for Display Devices

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Solution Overview

Problem

Existing gate driving circuits in display devices face challenges in maintaining a stable output waveform during alternating driving, leading to stress on transistors due to long-time driving and difficulties in applying alternating driving signals effectively.

Innovation Solution

A gate driver comprising two shift registers that alternately supply gate signals to gate lines, with each shift register controlling one side of the gate line, allowing for simultaneous and sequential signal application to reduce stress on transistors by alternating the driving timings of buffer transistors in bezel areas.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Device complexity

If a single shift register is used to generate gate pulses sequentially, then the circuit structure is simple, but the transistors experience long-time driving stress and waveform stability deteriorates

Engineering Contradiction:
Improvecircuit structureVSAvoidwaveform stability
Core Design Contradiction:
Device complexityVSReliability

Solution Approach 1:

The patent divides the gate pulse generation function into two separate shift registers (first shift register and second shift register), each responsible for controlling one side of the gate lines. This segmentation allows the transistors in each shift register to alternate their driving periods, preventing continuous operation stress and improving waveform stability while maintaining relatively simple circuit structures.

Inventive Principle:
Principle #1Segmentation

2Reliability

If alternating driving is applied to reduce transistor stress, then transistor reliability improves, but maintaining stable output waveform becomes difficult

Engineering Contradiction:
Improvetransistor reliabilityVSAvoidoutput waveform stability
Core Design Contradiction:
ReliabilityVSStability of the object's composition

Solution Approach 1:

The patent implements preliminary action by having both shift registers prepare and output gate pulses in advance. The first shift register outputs pulses to one side of the gate lines while the second shift register simultaneously outputs to the other side, ensuring that the gate lines receive continuous and stable drive signals even though individual transistors are alternating their operation. This preliminary coordination maintains waveform stability while achieving transistor rest periods.

Inventive Principle:
Principle #10Preliminary action

3Reliability

If two shift registers are used to control both sides of gate lines, then transistor stress is reduced through alternating driving, but device complexity increases

Engineering Contradiction:
Improvetransistor stress reductionVSAvoidnumber of shift registers
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent merges the control functions of two shift registers by connecting them in parallel to control both sides of the same gate lines. Both shift registers operate simultaneously with their respective output nodes connected to opposite ends of the gate lines, achieving alternating driving benefit while using a unified and integrated circuit architecture that minimizes additional complexity.

Inventive Principle:
Principle #5Merging (Combining)

Data Source

PatentUS11830436B2Gate driver and display device including the same
Publication Date: 2023.11.28 LG DISPLAY CO LTD
  • US11830436B2 patent drawing
  • US11830436B2 patent drawing
  • US11830436B2 patent drawing

AI summary

A gate driver includes a first shift register to supply a gate signal to a plurality of gate lines through output nodes, and a second shift register to supply the gate signal to the gate lines through output nodes. The gate signal is supplied from the first shift register to one side of an i-th gate line and supplied from the second shift register to the other side of the i-th gate line, then the gate signal is supplied from the second shift register to the other side of the i-th gate line, then the gate signal is supplied from the first shift register to one side of the i-th gate line, and then, the gate signal is supplied from the first shift register to one side of the i-th gate line and simultaneously supplied from the second shift register to the other side of the i-th gate line.