Dual-Side IC Packaging with Vertical Conductive Post
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Solution Overview
Problem
Current integrated circuit packaging systems face challenges in achieving miniaturization, increased density, performance, and cost reduction while maintaining reliability, as they struggle to efficiently integrate more components into smaller spaces with existing technologies.
Innovation Solution
The proposed solution involves forming a dual side connection system with a first terminal, connecting an integrated circuit to it, and creating a second terminal over the first terminal and the integrated circuit using a vertical conductive post, which is integral with either terminal, and then encapsulating the circuit and post while leaving terminal portions exposed.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If integrated circuits are stacked into a single package to increase density, then packaging density is improved, but manufacturing complexity increases
Solution Approach 1:
The patent combines multiple integrated circuits into a single package structure with shared terminals and interconnections. The first and second integrated circuits are mounted on a package substrate with common first terminals and second terminals, eliminating the need for separate packaging and reducing overall manufacturing complexity while increasing packaging density.
Solution Approach 2:
The package structure serves multiple functions simultaneously: it houses multiple integrated circuits, provides electrical interconnections between them, offers mechanical support, and enables both individual and combined access to the circuits. The shared terminals and interconnection structure allow the package to function as both a multi-chip carrier and an integrated circuit board.
2Volume of moving object
If component miniaturization is pursued to reduce product size, then product size is reduced, but manufacturing precision requirements increase
Solution Approach 1:
The patent segments the package into distinct functional regions: first terminals region, second terminals region, integrated circuit mounting areas, and interconnection structures. This segmentation allows each component to be manufactured and assembled with standard precision tolerances, reducing the cumulative precision requirements that would arise from miniaturizing the entire package as a single component.
Solution Approach 2:
The patent utilizes three-dimensional packaging architecture with vertical stacking of integrated circuits and lateral extension of terminal arrays. By distributing components across multiple dimensions rather than compressing everything into a single plane, the design achieves compact overall size while maintaining adequate spacing and standard manufacturing tolerances for each individual component.
3Adaptability or versatility
If more integrated circuits are integrated into each package to increase functionality, then functional integration is improved, but space availability decreases
Solution Approach 1:
The patent implements a nested packaging structure where integrated circuits are mounted on a package substrate that itself is mounted on a larger carrier or system board. The first and second integrated circuits are nested within the package structure, with their terminals nested within the terminal arrays. This nested arrangement maximizes functional integration while efficiently utilizing available space at each hierarchical level.
Solution Approach 2:
The patent transitions from two-dimensional planar arrangement to three-dimensional packaging by stacking integrated circuits vertically and extending terminal arrays in multiple directions. This dimensional expansion allows more circuits to be integrated into the package volume without proportionally increasing the package footprint, thereby maintaining space availability while improving functional integration.
Data Source
AI summary
A method of manufacture of an integrated circuit packaging system includes: forming a first terminal; connecting an integrated circuit to the first terminal; forming a second terminal connected over the first terminal and the integrated circuit by a vertical conductive post integral with the first terminal or the second terminal; and encapsulating the integrated circuit and the vertical conductive post leaving portions of the first terminal and the second terminal exposed.