Dual-Side Access Circuits for Nonvolatile Memory Voltage Drop
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Solution Overview
Problem
Existing MRAM devices face voltage drop issues due to increased resistance in metal lines as technology nodes shrink, leading to insufficient programming voltage for MRAM cells far from driver and pull-down circuits, especially in large memory arrays.
Innovation Solution
Implementing driver circuits and pull-down circuits on opposite sides of the memory array, with multiple sub-circuits on each side to reduce equivalent resistance and enhance write/read margins by allowing currents to flow in different directions.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Device complexity
If driver circuits and pull-down circuits are placed on the same side of the memory array, then device complexity is reduced, but voltage drop increases for memory cells far from the circuits
Solution Approach 1:
The patent divides the access circuits into multiple segments distributed across different sides of the memory array. Specifically, driver circuits are placed on a first side while pull-down circuits are placed on a second side, creating spatially segmented current paths that reduce the distance electrons must travel through high-resistance metal lines, thereby reducing voltage drop for memory cells located far from the circuit interfaces.
2Area of stationary object
If technology nodes are reduced to increase integration density, then more memory cells fit in given area, but metal line resistance increases causing voltage drop
Solution Approach 1:
The patent transitions from a one-sided circuit interface to a two-sided circuit interface configuration. By placing driver and pull-down circuits on opposite sides of the memory array, the current paths are distributed across multiple spatial dimensions, reducing the effective path length through high-resistance metal lines and mitigating voltage drop effects that scale with integration density.
3Quantity of substance
If memory array size is increased, then storage capacity improves, but voltage drop in metal lines increases for distant cells
Solution Approach 1:
The patent applies local quality by creating region-specific circuit interfaces. Memory cells are accessed through nearby circuit interfaces rather than distant centralized circuits, with current paths optimized for local regions. This distributes the voltage application and grounding functions across multiple locations, ensuring that even in large memory arrays, no single cell is too far from an adequate voltage source or ground reference.
Data Source
AI summary
A memory circuit includes a memory array comprising a plurality of non-volatile memory cells, wherein the non-volatile memory cells are arranged along a plurality of access lines that extend along a lateral direction. The memory circuit includes a first access circuit physically disposed on a first side of the memory array in the lateral direction. The memory circuit includes a second access circuit physically disposed on a second side of the memory array in the lateral direction, the second side being opposite to the first side. When each of the non-volatile memory cells is configured to be programmed by at least a first current and a second current, the first current and second current flow through a first path and a second path, respectively. The first path at least comprises a portion on the first side and the second path at least comprises a portion on the second side.