Semiconductor Package Assembly Using Dual-Side Warpage Control
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Solution Overview
Problem
Existing semiconductor package structures face issues with warpage and delamination due to thermal stress, which affects the reliability of the package.
Innovation Solution
The implementation of underfill elements and molding layers with different thermal and mechanical properties on both sides of a package substrate to reduce warpage and prevent delamination, while enhancing the connection between the package substrate and the devices.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If molding layers are added to encapsulate semiconductor devices, then protection and structural integrity are improved, but warpage and delamination occur due to thermal stress
Solution Approach 1:
The patent applies underfill elements with specific thermal and mechanical properties at the bonding interface between the package substrate and semiconductor devices. These underfill elements are placed locally at critical stress points to counteract thermal stress and prevent warpage, rather than uniformly modifying the entire structure. This localized application addresses the warpage issue without compromising the overall protection function of the molding layers.
Solution Approach 2:
The patent employs composite material structures consisting of multiple molding layers with different properties and underfill elements with tailored thermal and mechanical characteristics. The first molding layer encapsulates integrated passive devices while the second molding layer encapsulates the semiconductor die, with underfill elements positioned between these layers and the substrate. This composite structure balances thermal stress distribution to prevent both warpage and delamination.
2Shape
If molding layers with different thermal properties are used, then warpage control is improved, but delamination risk at bonding interfaces increases
Solution Approach 1:
The underfill elements serve as intermediary materials between the package substrate, molding layers, and semiconductor devices. These intermediaries have specifically engineered thermal and mechanical properties that bridge the mismatch between different materials, reducing thermal stress concentration at bonding interfaces. The underfill elements prevent delamination by distributing stresses uniformly across the interface while allowing controlled warpage reduction.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This solution effectively reduces warpage on the package substrate and avoids delamination at the bonding interface, thereby improving the reliability and stability of the semiconductor device package.
Implementation Method 1
warpage and delamination due to thermal stress
Implementation Method 2
warpage and delamination due to thermal stress
Implementation Method 3
warpage and delamination due to thermal stress
Data Source
AI summary
A semiconductor device package and a method of forming the same are provided. The semiconductor device package includes a package substrate having a first surface and a second surface opposite to the first surface. Several integrated devices are bonded to the first surface of the package substrate. A first underfill element is disposed over the first surface and surrounds the integrated devices. A first molding layer is disposed over the first surface and surrounds the integrated devices and the first underfill element. A semiconductor die is bonded to the second surface of the package substrate. A second underfill element is disposed over the second surface and surrounds the semiconductor die. A second molding layer is disposed over the second surface and surrounds the semiconductor die and the second underfill element. Several conductive bumps are disposed over the second surface and adjacent to the second molding layer.