Dual-Sided Bridge Die Packaging for High-Bandwidth SiP Interconnects
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Solution Overview
Problem
Existing SiP packages face challenges in achieving high-bandwidth communication between multiple semiconductor die due to insufficient conductive traces, which is exacerbated by the additional design constraints introduced by bridge die.
Innovation Solution
A dual-sided bridge die package structure is developed, where bridge die are embedded on both sides of a single interconnect structure, increasing design flexibility and bandwidth capabilities.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If bridge die are added to facilitate high-bandwidth communication, then data bandwidth between semiconductor die is improved, but device complexity increases due to additional components and design constraints
Solution Approach 1:
The bridge die structure is segmented into two separate bridge die (first and second bridge die) positioned on opposite sides of the interconnect structure, allowing independent optimization of each bridge die while distributing the bandwidth load across multiple segments, thereby reducing the complexity burden on any single component
Solution Approach 2:
The patent transitions from a single-sided bridge die configuration to a dual-sided configuration, utilizing the third dimension (vertical stacking) to place bridge die on both top and bottom surfaces of the interconnect structure, effectively doubling the bandwidth capacity without increasing the planar footprint or adding lateral complexity
2Device complexity
If single-sided bridge die configuration is used, then device complexity is reduced, but data bandwidth capability is insufficient for high-bandwidth communication requirements
Solution Approach 1:
The invention exploits the vertical dimension by implementing bridge die on both sides of the interconnect structure, transforming a two-dimensional single-sided layout into a three-dimensional dual-sided architecture, thereby multiplying bandwidth capacity without proportionally increasing complexity
Solution Approach 2:
The first and second bridge die are merged into a unified dual-sided interconnect structure, where both bridge die work in parallel to provide combined bandwidth capacity, effectively combining the capabilities of multiple components while sharing common support infrastructure
3Reliability
If multiple bridge die are implemented to increase bandwidth, then communication capability is improved, but manufacturing precision requirements increase due to additional alignment constraints
Solution Approach 1:
The manufacturing process is segmented into separate stages for forming the first bridge die and second bridge die, allowing each to be independently fabricated and aligned to their respective bonding surfaces, thereby distributing the precision requirement across multiple manageable steps rather than requiring all components to be perfectly aligned in a single operation
Solution Approach 2:
The interconnect structure is preliminarily formed with designated bonding surfaces and interconnect structures before the bridge die are attached, establishing precise reference geometries in advance that guide the subsequent placement and alignment of bridge die, thereby reducing the actual alignment precision required during final assembly
Data Source
AI summary
A semiconductor device has a first interconnect structure. A first bridge die is disposed over the first interconnect structure. An encapsulant is deposited over the first bridge die. A second interconnect structure is formed over the first bridge die and encapsulant. A second bridge die is disposed over the second interconnect structure.