Dual-Sided DRAM Structure for High Cell Density Stability
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Solution Overview
Problem
The high aspect ratio of capacitors in present DRAMs leads to mechanical instability as design rules shrink, affecting the reliability and density of semiconductor memory cells.
Innovation Solution
A semiconductor structure is designed with both frontside and backside DRAMs on a substrate, where peripheral transistors are located at the same device level as frontside transistors and electrically connected to both, enhancing cell density and stability through a dual-layered DRAM configuration.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If design rules shrink to increase cell density, then storage capacity improves, but capacitor mechanical stability deteriorates due to high aspect ratio
Solution Approach 1:
The patent transitions from a single-sided DRAM structure to a dual-sided structure, utilizing the third dimension (substrate thickness) to separate frontside and backside components. This dimensional change allows capacitors to be positioned on the backside while transistors remain on the frontside, reducing the aspect ratio of backside capacitors and improving their mechanical stability while maintaining high cell density.
Solution Approach 2:
The patent segments the DRAM structure into distinct frontside and backside regions, with specific components (transistors, capacitors, bitlines, wordlines) separated across the substrate. This segmentation allows independent optimization of each region, enabling backside capacitors to have lower aspect ratios while frontside transistors maintain their functionality.
2Device complexity
If peripheral transistors are integrated at the same device level as frontside transistors, then device complexity is reduced, but manufacturing precision requirements increase
Solution Approach 1:
The patent merges the formation of frontside transistors and peripheral transistors into a single processing step, creating both transistor types at the same device level simultaneously. This consolidation reduces the number of fabrication steps and simplifies the overall device structure, while the dual-sided capacitor placement compensates for the increased alignment requirements.
Data Source
AI summary
A semiconductor structure having a high cell density is provided in which a frontside dynamic access memory (DRAM) is located on a frontside of a semiconductor substrate, and a backside DRAM is located on a backside of the semiconductor substrate. Peripheral transistors can be located on the frontside of the semiconductor substrate and at a same level as frontside transistors of the frontside DRAM.