Dual-Sided Interposer Memory Package with Through-Via Bonding
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Solution Overview
Problem
The challenge in semiconductor packaging is to reduce the overall height and footprint of devices while maintaining high density, as smaller bond wires are prone to deformation and short circuits due to encapsulating materials, leading to device malfunction or failure.
Innovation Solution
The solution involves positioning semiconductor dies on both sides of an interposer with bond wires extending through windows in the interposer, allowing them to be protected from encapsulating materials and reducing the overall height, enabling the use of smaller diameter wires without adding to the device height.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Loss of substance
If bond wires are placed closer together to reduce device footprint, then material cost is reduced, but bond wires become susceptible to deformation and short circuits due to encapsulating material sweep
Solution Approach 1:
The patent transitions from a planar wire arrangement to a three-dimensional structure by routing bond wires through vertical vias in the interposer. This allows wires to be positioned at different heights and protected by overhanging die structures, resolving the contradiction between using smaller wires and preventing their deformation during encapsulation.
Solution Approach 2:
The interposer acts as an intermediary structure that provides protected pathways for bond wires. The vias in the interposer shield the wires from direct exposure to encapsulating material sweep, while the overhanging die structures provide additional protection, allowing smaller wires to be used without compromising reliability.
2Reliability
If traditional wire bonding is used with dies on the same side of interposer, then electrical connection is achieved, but bond wire loop height increases the overall device height
Solution Approach 1:
The patent utilizes the vertical dimension by placing dies on opposite sides of the interposer and routing wires through vertical vias. This eliminates the need for high loop bonds, as wires travel directly through the interposer thickness rather than forming large loops above the die surface, significantly reducing overall device height.
Solution Approach 2:
Instead of routing wires from die to interposer surface in the traditional manner, the patent inverts the approach by having wires pass through the interposer from one side to the other. This reversal of the routing path eliminates the loop height requirement while maintaining electrical connectivity.
3Area of stationary object
If dies are stacked on top of each other to increase density, then footprint is reduced, but providing adequate electrical interconnects becomes more difficult
Solution Approach 1:
The patent resolves the interconnection complexity by utilizing the vertical dimension through the interposer. Wires pass through vias in the interposer to connect dies on opposite sides, providing direct electrical pathways without requiring complex lateral routing or additional intermediary components, thus simplifying the interconnection architecture while maintaining high density.
Data Source
AI summary
A semiconductor die that includes a first die located on a first side of an interposer and a second die located on a second side of the interposer. Active sides of the first and second dies may each face the interposer. A bond wire may electrically connect the first die to the second side of the interposer and a bond wire may electrically connect the second die to the first side of the interposer. The bond wires may extend through a plurality of windows in the interposer. First and second dies may be attached to a first side of an interposer and may be electrically connected to a second side of the interposer through windows and third and fourth dies may be attached to a second side of the interposer and may be electrically connected to the first side of the interposer through windows.