Dual-Sided Co-Packaged Optics for Higher Bandwidth Density
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Solution Overview
Problem
Current high bandwidth density optics packaging in data centers is limited by the area constraints around integrated circuits (ICs), leading to increased distance between ICs and photonic engines, resulting in power penalties due to interconnect losses when additional photonic engines are added on the system board.
Innovation Solution
The solution involves packaging photonic engines on both the top and bottom surfaces of an interposer, utilizing sockets with increased stand-off heights to stack photonic engines and minimize interconnect distance, thereby reducing power consumption and enhancing bandwidth density.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If photonic engines are packaged on the same surface of the interposer as the IC, then the area around the perimeter of the IC is utilized, but future scaling by adding additional photonic engines is limited
Solution Approach 1:
The patent transitions from packaging photonic engines on a single two-dimensional surface to utilizing both surfaces of the interposer. This dimensional change allows photonic engines to be distributed across the top and bottom surfaces, effectively doubling the available packaging area and enabling future scaling without being constrained by the perimeter area around the IC on a single surface.
2Quantity of substance
If additional photonic engines are placed on the system board, then bandwidth is increased, but the distance between the IC and the photonic engine is increased causing power penalties
Solution Approach 1:
By packaging photonic engines on both surfaces of the interposer in close proximity to the IC, the patent minimizes interconnect distances while still achieving increased bandwidth density. This eliminates the need to place photonic engines far away on the system board, thereby avoiding power penalties from long interconnects while still achieving the goal of increased bandwidth.
Solution Approach 2:
The patent merges the IC and photonic engines into a tightly integrated co-packaged optics architecture on the same interposer. This integration minimizes the distance between components, reducing interconnect losses and power consumption while achieving high bandwidth density through the coordinated operation of multiple photonic engines in close proximity to the IC.
3Quantity of substance
If photonic engines are placed on both surfaces of the interposer, then bandwidth density is doubled, but the device complexity increases
Solution Approach 1:
The patent utilizes the third dimension (both surfaces of the interposer) to package photonic engines, effectively doubling bandwidth density. While this increases device complexity, the systematic approach of distributing engines across both surfaces with minimized interconnect distances creates a scalable architecture that manages complexity through spatial organization rather than complex interconnection schemes.
Data Source
Figure 1A
Figure 1B
Figure 2A~2B
AI summary
Embodiments disclosed herein include electronic packages for optical to electrical switching. In an embodiment, an electronic package comprises a first package substrate (105) and a second package substrate (106) attached to the first package substrate (105). In an embodiment, a die (110) is attached to the second package substrate (106). In an embodiment, a plurality of photonics engines (120) are attached to a first surface (101) and a second surface (102) of the first package substrate (105). In an embodiment, the plurality of photonics engines (120) are communicatively coupled to the die (110) through the first package substrate (105) and the second package substrate (106).