Dual-Sided Electronic Package Layout for EMI and Volume Reduction
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Solution Overview
Problem
Conventional semiconductor packages face challenges in reducing volume to meet the requirements of being light, thin, and short due to the need for increased layout area with multiple semiconductor and passive elements, which interferes electromagnetically.
Innovation Solution
A dual-sided electronic package design with a carrier structure having distinct encapsulation layers and conductive structures, where the first conductive structure is exposed from the encapsulation layer to connect externally without increasing layout area, and a second conductive structure shields the second electronic elements to prevent electromagnetic interference.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If a large number of semiconductor elements and passive elements are arranged on the package substrate according to functional requirements, then the functional requirements (such as antennas) are met, but the layout area of the package substrate needs to be increased, resulting in increased volume of the semiconductor package
Solution Approach 1:
The patent transitions from a conventional single-sided package structure to a dual-sided package structure, utilizing both the front side and back side of the package substrate for element placement. This dimensional change allows semiconductor elements and passive elements to be arranged on opposite sides of the substrate, effectively doubling the available layout area without increasing the overall package footprint, thus reducing package volume while meeting functional requirements
Solution Approach 2:
The package substrate is divided into distinct functional regions on different sides: the front side contains semiconductor elements and transmission lines, while the back side contains passive elements and grounding structures. This segmentation allows independent optimization of each side's layout, improving electromagnetic compatibility and space utilization, thereby reducing the required package volume
2Quantity of substance
If the layout area of the package substrate is increased to accommodate multiple elements, then more elements can be placed, but the semiconductor package cannot meet the requirements of being light, thin and short
Solution Approach 1:
By utilizing the back side of the package substrate for element placement, the patent effectively adds a third dimension (z-axis utilization of both surfaces) to the layout design. This allows a greater quantity of elements to be accommodated within the same planar footprint, preventing an increase in package length, width, or height
3Volume of stationary object
If semiconductor elements and passive elements are arranged in close proximity to reduce package size, then package volume is reduced, but electromagnetic interference occurs between elements
Solution Approach 1:
The patent segments the package into distinct electromagnetic zones: signal transmission zones on the front side and grounding/reference zones on the back side. By separating active semiconductor elements from passive elements and grounding structures onto opposite sides of the substrate, electromagnetic interference is minimized while maintaining compact package dimensions
Solution Approach 2:
The package substrate itself acts as an intermediary that provides electromagnetic isolation between elements on opposite sides. The substrate material and its ground planes serve as shielding barriers that prevent direct electromagnetic coupling between front-side and back-side elements, allowing close proximity placement without interference
Data Source
AI summary
An electronic package is provided and includes at least one electronic element, at least one first conductive structure and a second conductive structure disposed on one side of a carrier structure with at least one circuit layer, and an encapsulation layer covering the electronic element, the first conductive structure and the second conductive structure, where the first conductive structure is exposed from the encapsulation layer to externally connect required elements according to functional requirements.