Dual-Sided Power Gate Metal Interconnects for Leakage Reduction
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Solution Overview
Problem
The challenge in semiconductor devices is to integrate high-performance and low-capacitance, low-power components within a single chip, while optimizing performance and reducing leakage power consumption, especially as feature scaling advances in integrated circuits.
Innovation Solution
The implementation of a power gating scheme with metal interconnects on both sides of a semiconductor device stratum, where a gated supply grid is disposed on the underside of the device, allowing for controlled power distribution to core logic circuitry through power gate transistors, reducing leakage by intercepting voltage supply networks.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Loss of energy
If power gating scheme with metal interconnects on both sides is implemented, then leakage power consumption is reduced, but device complexity increases
Solution Approach 1:
The patent introduces metal interconnects on both the front and back sides of the semiconductor device stratum, transitioning from a single-sided to a dual-sided configuration. This dimensional change allows power distribution networks to be established on both surfaces, enabling more effective leakage reduction through additional power gating control paths while distributing the complexity across multiple layers rather than concentrating it in a single plane.
Solution Approach 2:
The power distribution network is segmented into front-side and back-side metal interconnect layers, with each layer handling specific power routing functions. The front side handles primary power distribution while the back side provides additional gating control and secondary distribution paths. This segmentation allows independent optimization of each layer's routing and reduces the complexity burden on any single metal layer.
2Quantity of substance
If feature scaling is advanced to increase device density, then capacity is increased, but performance optimization becomes more difficult
Solution Approach 1:
By utilizing both front and back sides of the device stratum for metal interconnects, the patent effectively doubles the available routing real estate. This allows power distribution networks to be established without consuming additional planar area on the device surface, thereby maintaining high device density while providing enhanced power control capabilities for performance optimization in scaled devices.
3Adaptability or versatility
If high-performance and low-power devices are integrated in a single chip, then functionality is improved, but manufacturing complexity increases
Solution Approach 1:
The dual-sided metal interconnect structure serves multiple functions simultaneously: it provides power distribution, enables power gating control, establishes voltage supply networks, and facilitates both high-performance and low-power device integration on the same chip. This multi-functionality reduces the need for separate dedicated structures for each function, thereby managing manufacturing complexity while achieving versatile functionality.
Data Source
AI summary
An apparatus including a circuit structure including a device stratum including a plurality of transistor devices each including a first side defined by a gate electrode and an opposite second side; and a gated supply grid disposed on the second side of the structure, wherein a drain of the at least one of the plurality of transistor devices is coupled to the gated supply grid. A method including providing a supply from a package substrate to power gate transistors in a device layer of a circuit structure, the transistors coupled to circuitry operable to receive a gated supply from the power gate transistors; and distributing the gated supply from the power gate transistors to the circuitry using a grid on an underside of the device layer.