Dual-Sided Quantum Chip Structure for Stronger Readout Coupling
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Solution Overview
Problem
The challenge in quantum computing is the difficulty in increasing coupling strength between quantum bits and reading cavities in single-sided planar structures, especially with a large number of quantum bits, which limits chip size reduction and performance.
Innovation Solution
A quantum chip design with a reading cavity on one substrate surface and quantum bits on the opposite surface, coupled by a capacitor, allowing for increased coupling strength and reduced wiring complexity.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Device complexity
If a single-sided planar structure is used with quantum bits and reading cavities on the same surface, then the chip structure is simple, but the coupling strength between quantum bit and reading cavity is weak
Solution Approach 1:
The patent transitions from a single-sided planar structure to a dual-sided three-dimensional structure, where quantum bits and reading cavities are positioned on opposite surfaces of the substrate. This dimensional change enables stronger coupling by allowing electromagnetic fields to interact more effectively across the substrate thickness, while the capacitor structure maintains manufacturability through planar fabrication processes on each surface.
2Adaptability or versatility
If the number of quantum bits is increased, then quantum computing capability is improved, but the chip size increases and wiring difficulty increases
Solution Approach 1:
By distributing quantum bits and reading cavities on opposite surfaces of the substrate, the patent creates a three-dimensional architecture that reduces the planar area required for each quantum bit. This allows more quantum bits to be packed into a smaller chip area, improving quantum computing capability while controlling chip size and wiring complexity through vertical stacking rather than horizontal expansion.
3Area of stationary object
If quantum bits and reading cavities are positioned on the same surface, then the structure is compact, but the equivalent distance between them becomes large
Solution Approach 1:
The patent positions quantum bits and reading cavities on opposite surfaces of the substrate, utilizing the third dimension (substrate thickness) to reduce the equivalent distance between them. This three-dimensional arrangement allows the components to be closer together in terms of electromagnetic interaction distance, improving coupling strength while maintaining a compact chip footprint through vertical integration.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This design enhances coupling strength between quantum bits and reading cavities, improving performance and reducing the chip's size and wiring difficulty.
Implementation Method 1
the reading cavity and the quantum bit are mutually coupled by forming a capacitor therebetween
Data Source
AI summary
A quantum chip and a quantum computing device are applied to the field of quantum computing technologies. The quantum chip includes a first substrate and a second substrate arranged oppositely, where a reading cavity is formed on a side surface of the first substrate facing the second substrate, a quantum bit corresponding to the reading cavity is disposed on a side surface of the second substrate facing the first substrate, and the reading cavity and the quantum bit are mutually coupled by forming a capacitor therebetween. Structures of a quantum chip body are disposed on two opposite surfaces respectively, and structural components on the two surfaces are mutually coupled to form the quantum chip body, which may reduce the number of the structural components disposed in any surface, thereby lowering the wiring difficulty of the structures of the quantum chip body in any surface