Dual-Sided Semiconductor Packaging With Single-Step Encapsulation

Resolve Bottlenecks,
Find Innovative Solutions
Generate Solutions

Solution Overview

Problem

Conventional semiconductor packages face issues of high cost, decreased reliability, and large package sizes, leading to suboptimal performance.

Innovation Solution

A semiconductor device design featuring a main substrate with electronic components on both sides, a substrate structure, and an encapsulant structure that provides protection and electrical coupling, utilizing a single encapsulation operation for both the top and bottom sides, and a carrier that is removed post-attachment, allowing for efficient manufacturing and reduced size.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If conventional semiconductor packaging methods are used, then manufacturing cost is high and package size is large, but reliability and performance are decreased

Engineering Contradiction:
ImprovereliabilityVSAvoidmanufacturing cost
Core Design Contradiction:
ReliabilityVSEase of manufacture

Solution Approach 1:

The patent divides the encapsulation process into two separate operations: first encapsulating the top side with a top encapsulant, then encapsulating the bottom side with a bottom encapsulant. This segmentation allows each encapsulation to be optimized independently, improving reliability while controlling manufacturing complexity through systematic process division

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent transitions from conventional single-side or sequential encapsulation to simultaneous dual-side encapsulation by providing both top and bottom encapsulants that extend beyond respective edges of the substrate. This dimensional approach allows both sides to be encapsulated in a coordinated manner, improving overall device reliability and protection

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

2Reliability

If conventional semiconductor packaging methods are used, then package size is large, but performance is decreased

Engineering Contradiction:
ImproveperformanceVSAvoidpackage size
Core Design Contradiction:
ReliabilityVSVolume of moving object

Solution Approach 1:

The patent applies different encapsulant configurations to different regions: the top encapsulant extends beyond top edges of the substrate, while the bottom encapsulant extends beyond bottom edges. This local quality approach optimizes protection and electrical coupling in specific areas without uniformly increasing overall package size, thereby maintaining performance while controlling dimensions

Inventive Principle:
Principle #3Local quality

3Productivity

If single encapsulation operation is used for both top and bottom sides, then manufacturing efficiency is improved, but encapsulation quality may be compromised

Engineering Contradiction:
Improvemanufacturing efficiencyVSAvoidencapsulation quality
Core Design Contradiction:
ProductivityVSManufacturing precision

Solution Approach 1:

The patent segments the encapsulation quality control into two independent aspects: top encapsulant quality and bottom encapsulant quality. Each encapsulant can be formed, cured, and inspected independently, ensuring high manufacturing precision for each side while maintaining overall process efficiency through the coordinated single-operation approach

Inventive Principle:
Principle #1Segmentation

Data Source

PatentUS11854991B2Semiconductor devices and methods of manufacturing semiconductor devices
Publication Date: 2023.12.26 AMKOR TECH SINGAPORE HLDG PTE LTD
  • US11854991B2 patent drawing
  • US11854991B2 patent drawing
  • US11854991B2 patent drawing

AI summary

In one example, a semiconductor device comprises a main substrate having a top side and a bottom side, a first electronic component on the top side of the main substrate, a second electronic component on the bottom side of the main substrate, a substrate structure on the bottom side of the main substrate adjacent to the second electronic component, and an encapsulant structure comprising an encapsulant top portion on the top side of the main substrate and contacting a side of the first electronic component, and an encapsulant bottom portion on the bottom side of the main substrate and contacting a side of the second electronic component and a side of the substrate structure. Other examples and related methods are also disclosed herein.