Dual Signal-Line Image Sensor for High Capacitance in Small Chips
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Solution Overview
Problem
Existing image sensors face challenges in reducing chip area while maintaining high capacitance values, as they require a large number of capacitors for signal transfer, leading to increased chip size.
Innovation Solution
The implementation of a dual vertical signal line system, where one line accumulates photoelectrically converted signals and the other accumulates noise signals, utilizing the signal lines as capacitors to achieve high capacitance without increasing chip area, and employing a backside-illuminated type image sensor to further reduce chip size.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a large number of capacitors are provided to one pixel column for signal transfer, then signal transfer capability is improved, but chip area increases
Solution Approach 1:
The patent merges the capacitor function into the signal line structure itself. The signal line is designed with a meander pattern that inherently provides capacitance, eliminating the need for separate capacitor components. This integration allows the signal line to serve dual purposes: signal transmission and charge storage, thereby improving signal transfer capability without increasing chip area.
Solution Approach 2:
The signal line is designed to perform multiple functions simultaneously. It acts as both a signal transmission path and a capacitor for charge storage. The meander pattern of the signal line creates parasitic capacitance that is utilized for holding charge, making the signal line a multi-functional element that reduces the overall component count and chip area.
2Productivity
If separate signal lines are provided for signal transfer and noise output, then signal processing efficiency is improved, but device complexity increases
Solution Approach 1:
The patent segments the signal processing function into two separate output paths: one for signal transfer and another for noise output. This segmentation allows simultaneous processing of signal and noise components through different channels, improving signal processing efficiency by enabling parallel operations and reducing interference between signal and noise paths.
Solution Approach 2:
The patent utilizes the vertical dimension by implementing a backside-illuminated sensor structure. The photoelectric conversion units are positioned on the backside of the substrate, allowing light to incident from the rear. This dimensional change enables better separation of signal and noise paths and improves overall sensor performance without increasing planar chip area.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach allows for large capacitance values without expanding the chip area and reduces chip size, enabling efficient signal processing and noise suppression, thereby enhancing image sensor performance.
Implementation Method 1
a plurality of pixels having photoelectric conversion units that convert incident light to charges
Implementation Method 2
a capacitance that stores the signal outputted to the signal line, and due to a conductor that constitutes the signal line and another conductor
Data Source
AI summary
An image sensor includes: a plurality of pixels having photoelectric conversion units that convert incident light to charges, and readout units; a first signal line, connected to the plurality of pixels, that outputs a first signal transferred to the readout unit based upon the charge converted by the photoelectric conversion unit; and a second signal line, connected to the plurality of pixels, that outputs a second signal after the readout unit has been reset.