Dual Slit Memory Stack Layout for Reliable Offset Contact Plugs
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Solution Overview
Problem
The integration limits of two-dimensional nonvolatile memory devices have been reached, necessitating the development of three-dimensional structures, but existing three-dimensional nonvolatile memory devices face challenges in maintaining operational reliability and stability due to issues with charge accumulation and damage during manufacturing processes.
Innovation Solution
The semiconductor device incorporates dual slit structures and an offset contact plug design, where the slit structures are spaced apart to prevent damage and charge accumulation, ensuring stable connectivity and reliability by maintaining sufficient distance between the slit structures and the contact plug.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If three-dimensional structures are adopted to overcome integration limits, then storage capacity is improved, but operational reliability deteriorates due to charge accumulation and manufacturing damage
Solution Approach 1:
The patent divides the contact structure into multiple segmented components: a contact plug, multiple slit structures (first slit, second slit, third slit), and multiple spacers. This segmentation isolates the contact plug from direct exposure to manufacturing processes while maintaining electrical connectivity, thereby improving reliability without sacrificing the three-dimensional storage capacity
Solution Approach 2:
The patent introduces spacer structures as intermediary elements between the contact plug and the slit structures. These spacers act as protective mediators that prevent direct contact between the contact plug and potentially damaging manufacturing processes (such as etching), while still allowing the slit structures to perform their function of removing sacrificial layers. This intermediary protection mechanism resolves the contradiction between achieving high storage capacity through 3D structures and maintaining operational reliability
2Area of stationary object
If slit structures are positioned close to contact plug for compact design, then device area is reduced, but manufacturing damage increases
Solution Approach 1:
The patent applies preliminary protective action by forming spacer structures around the contact plug before forming the slit structures. These spacers are prepared in advance to prevent potential manufacturing damage during subsequent etching processes. The first spacer is formed between the contact plug and the first slit, and the second spacer is formed between the contact plug and the second slit, creating a protective buffer zone that maintains compact design while preventing damage
Solution Approach 2:
The spacer structures serve as beforehand cushioning elements that absorb or mitigate the harmful effects of manufacturing processes. By positioning these spacers between the contact plug and the slit structures, the patent creates a cushioning layer that protects the contact plug from exposure to etching chemicals and physical damage during the removal of sacrificial layers, thus maintaining compact design without increasing manufacturing damage
Data Source
AI summary
A semiconductor device includes a line; a source structure on the line; a stack structure on the source structure; a first slit structure penetrating the stack structure; a second slit structure penetrating the stack structure; and a contact plug adjacent to the first slit structure in a first direction. The first slit structure and the second slit structure may be spaced apart from each other by a first distance in a second direction that is perpendicular to the first direction. The contact plug penetrates the source structure, the contact plug being electrically connected to the lower line. The first slit structure and the contact plug may be spaced apart from each other by a second distance in the first direction, and the second distance may be longer than the first distance.