Dual SoC Mailbox Architecture for Autonomous Vehicle Safety
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Current autonomous driving systems face challenges in achieving automotive safety integrity levels (ASIL) certification due to non-deterministic inference models, making it difficult to ensure operational safety, especially in riskier conditions such as inclement weather or complex road scenarios.
Innovation Solution
A dual System on Chip (SoC) arrangement with isolated power sources and eFuses for active circuit protection, along with direct memory access for dynamic health monitoring and seamless transitions between primary and backup SoCs, facilitates deterministic operations and ASIL grading.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If non-deterministic inference models are used in autonomous driving systems, then the system can handle complex road scenarios and inclement weather conditions, but the safety integrity level cannot be certified under automotive safety standards
Solution Approach 1:
The system is divided into multiple independent SoCs (System on Chips), each capable of autonomous operation. Each SoC processes sensor data independently through dedicated pipelines, allowing deterministic timing and safety certification while maintaining comprehensive functionality through the distributed architecture.
Solution Approach 2:
Multiple identical or complementary SoCs are deployed in parallel, each capable of executing the same safety-critical functions. This redundancy allows the system to achieve ASIL-D certification by ensuring that if one SoC fails, another can take over, while all SoCs process the same complex road scenarios simultaneously.
2Device complexity
If a single SoC architecture is used, then the system is simpler and more cost-effective, but redundancy and functional safety monitoring are insufficient for ASIL-D certification
Solution Approach 1:
The monolithic SoC is segmented into multiple independent SoCs, each with its own processor, memory, and sensor interfaces. This segmentation provides inherent redundancy and isolation, allowing functional safety monitoring between units while maintaining relatively simple individual chip designs that can be manufactured cost-effectively.
Solution Approach 2:
Multiple SoCs are merged into a coordinated system through standardized interconnects, combining their individual capabilities to achieve ASIL-D safety levels. The merged system shares memory spaces and processing workloads while maintaining independent safety monitoring channels, achieving both redundancy and cost-effectiveness.
3Reliability
If multiple SoCs are deployed for redundancy, then safety integrity level is enhanced, but the system complexity and manufacturing cost increase
Solution Approach 1:
Each SoC is designed as a universal, multi-functional unit capable of performing various autonomous driving tasks depending on configuration. This universality reduces the need for specialized hardware in each unit, simplifying the overall architecture while maintaining redundancy for safety certification.
Solution Approach 2:
The system configuration parameters (such as the number of active SoCs, their specific functions, and interconnection topologies) can be dynamically adjusted based on safety requirements and operational needs. This flexibility allows optimization of complexity versus reliability trade-offs without requiring complete hardware redesigns.
4Ease of manufacture
If traditional monolithic chip designs are used, then manufacturing is simpler and more cost-effective, but modularity and scalability are limited
Solution Approach 1:
The monolithic chip is segmented into multiple smaller, independently manufacturable SoCs. Each segment can be designed, fabricated, and tested separately using standard semiconductor processes, maintaining manufacturing simplicity while enabling modular assembly and scalability through chiplet interconnection technologies.
Solution Approach 2:
Multiple SoCs are nested within a larger system package, with each SoC containing its own functional components. This nested architecture allows for modular manufacturing of individual units that can then be assembled into scalable systems, combining the simplicity of standard chip fabrication with the versatility of modular system architecture.
Data Source
AI summary
A system-on-chip (SoC) designed for an autonomous vehicle includes a central chiplet to coordinate the operations of the SoC constituent chiplets. The central chiplet includes a shared memory storing a number of programs associated with parallel workload pipelines, one or more processors to execute a scheduling program, and a cache memory accessible by the chiplets of the SoC. The SoC also includes a sensor data input chiplet to receive sensor data from vehicle sensors and store the sensor data in the cache memory. The scheduling program running on the central chiplet schedules the programs and causes respective workloads of the parallel workload pipelines to execute based, at least in part, on the sensor data stored in the cache memory.