Dual Source Display Panel Data Line Segmentation for Threshold Compensation
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Solution Overview
Problem
Display panels with higher refresh rates face issues of insufficient threshold voltage compensation, leading to uneven displays due to inadequate connection configurations between data lines and gate lines, resulting in parasitic capacitance and potential differences affecting display quality.
Innovation Solution
The display panel employs a Dual Source structure with M*N display units connected in a specific array layout, where odd and even display columns are connected to different gate lines and data lines, respectively, and a data controller with multi-way switches ensures simultaneous data writing to both data lines between adjacent columns, increasing compensation time and avoiding floating states.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Speed
If the refresh rate of the display panel is increased to 120 Hz, then the visual enjoyment and display performance are improved, but the threshold voltage compensation capacity becomes insufficient, leading to uneven display
Solution Approach 1:
The display panel divides the data lines into two separate data lines (first data line and second data line) for each pair, with odd display rows connected to the first data line and even display rows connected to the second data line. This segmentation allows independent control and compensation of threshold voltage for different data lines, enabling sufficient compensation capacity even at high refresh rates of 120 Hz
Solution Approach 2:
The patent introduces a new dimension in the connection configuration by using (M+1) gate lines instead of M gate lines, and N pairs of data lines instead of N single data lines. This dimensional expansion creates additional connection paths and control dimensions, allowing the threshold voltage compensation to be performed more effectively across all display units simultaneously
2Device complexity
If traditional display panel structure and drive method are used, then the device complexity is low, but the display uniformity deteriorates due to insufficient threshold voltage compensation
Solution Approach 1:
The display panel segments the data lines into N pairs of first and second data lines, with each pair serving specific display rows (odd or even). This segmentation enables independent threshold voltage compensation for each data line, ensuring uniform display quality across the entire panel without requiring overly complex compensation circuits
Solution Approach 2:
The gate lines are designed to serve dual functions: they control the scanning of display rows during normal operation and simultaneously enable threshold voltage compensation for the corresponding data lines. This multi-functionality achieves uniform display without adding separate compensation circuits, maintaining device complexity at acceptable levels
3Device complexity
If data lines are connected to display units without specific configuration, then the connection complexity is low, but parasitic capacitance and potential differences affect display quality
Solution Approach 1:
Display units are segmented by row parity (odd or even) and connected to different data lines accordingly. This segmentation isolates the parasitic capacitance effects to individual data lines rather than allowing them to affect all data lines simultaneously, thereby maintaining display quality without requiring complex connection configurations
Solution Approach 2:
Each data line is assigned a specific function and connection pattern based on its local requirements. The first data line serves odd display rows while the second data line serves even display rows, allowing each data line to be optimized for its specific role and minimizing parasitic capacitance interference from other data lines
Data Source
AI summary
Provided are a display panel, a drive method thereof and a display apparatus. The display panel includes M*N display units disposed in an array defined by intersections of (M+1) gate lines and N pairs of data lines, and each pair of data lines include a first data line and a second data line; in an mth display row, display units of odd display columns are connected to an mth gate line, and display units of even display columns are connected to an (m+1)th gate line; in an nth display column, display units of odd display rows are connected to first data lines of an nth pair of data lines, and display units of even display rows are connected to second data lines of the nth pair of data lines.