Dual SRAM Power Control for Image Processing

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Solution Overview

Problem

Conventional power saving techniques for SRAM in image forming apparatuses are inefficient, leading to increased recovery time and power consumption due to unnecessary power supply to storage areas even when data is not needed, affecting job operations.

Innovation Solution

Implementing a dual SRAM configuration with a data processing unit, a first SRAM for storing parameters, a second SRAM for temporary data storage, and a control unit that manages power supply to switch between normal and power-saving modes, allowing the SRAM to transition into RS mode for data retention and SD mode for higher power savings based on job requirements.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Use of energy by stationary object

If power supply is shut off to the SRAM storage area to save power, then power consumption is reduced, but data is deleted and recovery time is lengthened

Engineering Contradiction:
Improvepower consumptionVSAvoidrecovery time
Core Design Contradiction:
Use of energy by stationary objectVSLoss of time

Solution Approach 1:

The SRAM circuit is divided into a control area and a storage area, allowing independent power control. The control area can be shut off to save power while the storage area maintains power supply to preserve data, resolving the contradiction between power saving and data retention.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

Different parts of the SRAM circuit have different power requirements. The control area consumes more power for data operations while the storage area only needs minimal power for data holding. By applying local quality control, power is supplied selectively to the storage area during idle periods to maintain data without unnecessary power consumption.

Inventive Principle:
Principle #3Local quality

2Reliability

If power supply is continuously maintained to the SRAM storage area, then data is retained, but power consumption cannot be reduced sufficiently

Engineering Contradiction:
Improvedata retentionVSAvoidpower consumption
Core Design Contradiction:
ReliabilityVSUse of energy by stationary object

Solution Approach 1:

The power supply state of the SRAM circuit is dynamically adjusted based on operational status. During idle periods, power is selectively maintained only to the storage area. When operations are needed, the control area is activated. This dynamic adjustment resolves the contradiction between data retention and power reduction.

Inventive Principle:
Principle #15Dynamics

3Use of energy by stationary object

If conventional SRAM power saving modes are used, then some power reduction is achieved, but efficient power control according to job requirements cannot be performed

Engineering Contradiction:
Improvepower consumptionVSAvoidpower control adaptability
Core Design Contradiction:
Use of energy by stationary objectVSAdaptability or versatility

Solution Approach 1:

The SRAM circuit is designed with multi-functionality, serving both as a control area and a storage area. This universal design enables the circuit to adapt to different job requirements by switching between functional states, achieving efficient and adaptable power control that conventional single-function SRAMs cannot provide.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Data Source

PatentUS10811060B2Information processing apparatus and control method thereof
Publication Date: 2020.10.20 CANON KK
  • US10811060B2 patent drawing
  • US10811060B2 patent drawing
  • US10811060B2 patent drawing

AI summary

The information processing includes: a first SRAM configured to store a parameter for performing data processing for data input to a data processing unit configured to perform the data processing; a second SRAM configured to temporarily store data processed by the data processing unit; a data control unit configured to control an output of the data stored in the second SRAM; and a control unit configured to perform power control to supply power to a storage area in which the parameter of the first SRAM is stored, stop power supply to a control area for writing the data to the first SRAM and a storage area in which the data of the second SRAM is stored, and stop power supply to a control area for writing the data in a case where a job that uses the first SRAM and the second SRAM is not performed.