Dual-Stage ECC Circuit for Incorrect Correction Detection

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Solution Overview

Problem

Error correction circuits in ECC technology can fail to correct data errors correctly, potentially converting correct data to incorrect data, compromising functional safety, especially in high-level applications.

Innovation Solution

A dual-stage error correction code circuit system that generates correction data and check bits, with a comparison circuit to verify the accuracy of the correction process, ensuring self-diagnosis and preventing incorrect data correction, thereby enhancing functional safety.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If ECC technology is used to correct data errors, then data transmission reliability is improved, but the risk of incorrect correction increases

Engineering Contradiction:
Improvedata transmission reliabilityVSAvoidincorrect correction risk
Core Design Contradiction:
ReliabilityVSObject-affected harmful factors

Solution Approach 1:

The error correction system is divided into multiple independent modules: a first error correction code circuit for initial correction, a second error correction code circuit for verification, and a comparison circuit for validation. This segmentation allows each module to perform its specific function independently, reducing the risk of incorrect correction while maintaining high reliability.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The comparison circuit compares the first correction check bit with the second correction check bit generated by the two error correction code circuits. This feedback mechanism validates the correction results and detects any incorrect corrections, thereby reducing the harmful effects while preserving the reliability benefits of ECC technology.

Inventive Principle:
Principle #23Feedback

2Device complexity

If a single error correction code circuit is used, then device complexity is reduced, but correction accuracy deteriorates

Engineering Contradiction:
Improvecircuit structure complexityVSAvoidcorrection accuracy
Core Design Contradiction:
Device complexityVSMeasurement precision

Solution Approach 1:

The correction accuracy is improved by segmenting the single error correction code circuit into two independent circuits: a first error correction code circuit that performs initial correction and generates a first correction check bit, and a second error correction code circuit that performs verification and generates a second correction check bit. This segmentation enhances correction accuracy while keeping each individual circuit module relatively simple.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The comparison circuit acts as an intermediary that validates the correction results by comparing check bits from both error correction code circuits. This intermediary component ensures high correction accuracy without requiring either of the error correction code circuits to be overly complex.

Inventive Principle:
Principle #24Intermediary (Mediator)

Data Source

PatentUS12189473B2Error correction code circuit and error correction method
Publication Date: 2025.01.07 BEIJING SEMIDRIVE TECHNOLOGY LTD
  • US12189473B2 patent drawing
  • US12189473B2 patent drawing
  • US12189473B2 patent drawing

AI summary

An error correction code circuit includes a first error correction code circuit configured to generate correction data and a first correction check bit according to received source data and a source check bit corresponding to the received source data, a second error correction code circuit connected to the first error correction code circuit, and configured to, according to the correction data and at least one of the first correction check bit or the source check bit, determine whether the correction data is wrong and generate a second correction check bit, and a comparison circuit connected between the first error correction code circuit and the second error correction code circuit, and configured to compare the first correction check bit with the second correction check bit and determine whether the first correction check bit is wrong.