Dual-Stage Equalizing Circuit for High-Speed Differential Receivers

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Solution Overview

Problem

Wired communication systems face challenges in enhancing communication speed due to channel losses caused by skin effects and dielectric losses, leading to significant attenuation of high-frequency signal components, which existing equalization methods struggle to effectively compensate for.

Innovation Solution

The implementation of a dual-stage equalization circuit comprising a continuous time linear equalizer (CTLE) and a decision feedback equalizer (DFE) with supplementary current sources and current addition paths, which provide inverse gain characteristics and feedback mechanisms to compensate for signal degradation and intersymbol interference.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If existing equalization methods are used, then device complexity is kept moderate, but the ability to compensate for high-frequency signal attenuation and intersymbol interference is insufficient

Engineering Contradiction:
Improvesignal compensation capabilityVSAvoidequalization circuit complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The equalization circuit is divided into two independent stages: CTLE (continuous-time linear equalizer) for high-frequency signal attenuation compensation, and DFE (decision feedback equalizer) for intersymbol interference compensation. Each stage targets a specific type of distortion, allowing them to be optimized independently and reducing the overall complexity compared to a single-stage solution attempting to handle all distortion types simultaneously.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The CTLE stage acts as an intermediary between the channel and the DFE stage, pre-compensating high-frequency attenuation before the signal enters the DFE. This intermediate processing reduces the burden on the DFE stage, allowing it to focus primarily on intersymbol interference compensation rather than having to handle both high-frequency attenuation and ISI simultaneously.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Productivity

If communication speed is increased, then productivity is improved, but channel losses from skin effects and dielectric losses cause greater signal attenuation

Engineering Contradiction:
Improvecommunication speedVSAvoidsignal quality
Core Design Contradiction:
ProductivityVSReliability

Solution Approach 1:

The CTLE stage applies preliminary equalization by providing inverse gain characteristics that compensate for high-frequency attenuation before the signal is further processed. By pre-compensating the frequency response in the continuous time domain, the system counteracts the effects of skin effects and dielectric losses that become more severe at higher communication speeds.

Inventive Principle:
Principle #9Preliminary anti-action

Solution Approach 2:

The DFE stage employs feedback mechanisms where previously decided symbols are used to predict and subtract intersymbol interference from the current symbol decision. This feedback approach dynamically compensates for signal degradation caused by high-speed transmission through the channel, maintaining signal quality even as communication speed increases.

Inventive Principle:
Principle #23Feedback

Data Source

PatentUS10622974B2Equalizing circuit and receiver
Publication Date: 2020.04.14 KIOXIA CORP
  • US10622974B2 patent drawing
  • US10622974B2 patent drawing
  • US10622974B2 patent drawing

AI summary

An equalizing circuit may include a first signal line, a second signal line, a first current source, a first switch, a second switch, a second current source, a third switch, and a fourth switch. The second signal line forms a differential pair with the first signal line. The first switch connects the first signal line and the first current source. The second switch connects the second signal line and the first current source. The third switch connects the first signal line and the second current source. The fourth switch connects the second signal line and the second current source.