Dual-Stage Feed Forward Equalizer for Timing Delay and SNR

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Solution Overview

Problem

In communication systems like 10G Base-T, Giga Ethernet, and 10/100 Ethernet, existing technologies face challenges in reducing timing recovery loop delay and enhancing signal-to-noise ratio (SNR) due to signal decay through channels, necessitating the use of feed forward equalizers and decision feedback equalizers.

Innovation Solution

A signal processing device comprising a shorter first feed forward equalizing unit and a longer second feed forward equalizing unit, along with data slicing units and an interference eliminating module, is implemented to generate equalized signals and reduce timing recovery loop delay while increasing SNR.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If a single long feed forward equalizing unit is used to compensate for signal decay, then the equalization effect is improved, but the timing recovery loop delay increases

Engineering Contradiction:
Improveequalization effectVSAvoidtiming recovery loop delay
Core Design Contradiction:
ReliabilityVSLoss of time

Solution Approach 1:

The patent divides the equalization function into two separate feed forward equalizing units with different tap numbers. The first unit has fewer taps and processes signals quickly, while the second unit has more taps and provides comprehensive equalization. This segmentation allows the system to achieve good equalization effect while reducing the overall timing recovery loop delay by processing signals in stages rather than requiring a single long equalizer.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The first feed forward equalizing unit performs preliminary equalization on the received signal before it enters the second equalizing unit. This preliminary action removes the most critical inter-symbol interference components early in the processing chain, allowing the second unit to focus on finer equalization adjustments and reducing the total processing delay.

Inventive Principle:
Principle #10Preliminary action

2Reliability

If a single long feed forward equalizing unit is used to eliminate channel effect, then the signal quality is improved, but the signal noise to ratio (SNR) decreases

Engineering Contradiction:
Improvesignal qualityVSAvoidsignal noise to ratio
Core Design Contradiction:
ReliabilityVSLoss of information

Solution Approach 1:

By segmenting the equalization into two units with different tap configurations, the patent avoids the noise amplification that occurs in single long equalizers. The first unit with fewer taps processes signals with less noise accumulation, and the second unit further equalizes without compounding the noise issue, thereby maintaining better SNR while achieving good signal quality.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent applies different equalization characteristics to different parts of the signal processing chain by using two equalizing units with different tap numbers. The first unit handles the critical early signal components with a configuration optimized for speed and noise performance, while the second unit addresses residual interference with a configuration optimized for comprehensive equalization, achieving local optimization of signal quality and SNR.

Inventive Principle:
Principle #3Local quality

Data Source

PatentUS8532167B2Signal processing device having feed forward equalizing units with different tap numbers utilized in communication system
Publication Date: 2013.09.10 REALTEK SEMICON CORP
  • US8532167B2 patent drawing
  • US8532167B2 patent drawing
  • US8532167B2 patent drawing

AI summary

The present invention provides a signal processing device. The signal processing device includes a first feed forward equalizing unit, a first data slicing unit, a second feed forward equalizing unit, and a second data slicing unit. The first feed forward equalizing unit is utilized for performing a compensation operation according to a digital input signal so as to generate a first equalized signal. The first data slicing unit is coupled to the first feed forward equalizing unit, and utilized for generating a first output signal according to the first equalized signal. The second feed forward equalizing unit is coupled to the first data slicing unit, and utilized for generating a second equalized signal according to the first equalized signal. The second data slicing unit is coupled to the second feed forward equalizing unit, and utilized for generating a second output signal according to the second equalized signal.