Dual-State Chip Boot With Selective Image Loading

Resolve Bottlenecks,
Find Innovative Solutions
Generate Solutions

Solution Overview

Problem

Current communication chips cannot meet the requirement of enabling communication in both power-on and power-off states, with one type requiring host support and another having poor processing capabilities, leading to increased costs and area overheads when both are used.

Innovation Solution

A chip boot method that detects the power status of the electronic device and determines whether an image needs to be burnt in a non-volatile memory, allowing it to perform different boot operations based on the device's state, ensuring communication in both power-on and power-off states by using a single chip with different images.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If a communication chip is designed to operate when the electronic device is powered off, then communication capability in power-off state is improved, but processing capability deteriorates

Engineering Contradiction:
Improvecommunication capability in power-off stateVSAvoidprocessing capability
Core Design Contradiction:
ReliabilityVSProductivity

Solution Approach 1:

The chip dynamically adjusts its operational mode based on the power state of the host device. When the host is powered on, the chip operates in a second image mode with full processing capability. When the host is powered off, the chip switches to a first image mode with limited but sufficient processing capability for basic communication functions, thus adapting its performance characteristics to match the operational requirements of each state.

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The patent changes the operational parameters of the chip by loading different images (first image for power-off state, second image for power-on state) into the non-volatile memory. Each image contains different instruction sets and configuration parameters optimized for its specific operational context, allowing the chip to achieve appropriate processing capability for each state without permanent degradation.

Inventive Principle:
Principle #35Parameter changes

2Reliability

If two types of communication chips are used (one for power-on state and one for power-off state), then communication capability in both states is improved, but device complexity and cost increase

Engineering Contradiction:
Improvecommunication capability in both statesVSAvoidchip configuration
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent makes a single communication chip universal by enabling it to perform both power-on and power-off state communication functions. The chip contains a non-volatile memory that can store multiple images (first image for power-off operation, second image for power-on operation) and selectively loads the appropriate image based on the host's power state, thereby eliminating the need for separate dedicated chips and reducing overall system complexity.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Solution Approach 2:

The patent segments the chip's operational functionality by dividing the firmware into distinct first and second images stored in the non-volatile memory. Each image represents a self-contained operational mode with its own instruction set and configuration. This segmentation allows the single chip to be programmed with multiple specialized functionalities that can be activated based on external conditions (host power state), effectively replacing multiple physical chips.

Inventive Principle:
Principle #1Segmentation

3Productivity

If a communication chip requires host support to operate, then processing capability is improved, but communication capability in power-off state deteriorates

Engineering Contradiction:
Improveprocessing capabilityVSAvoidcommunication capability in power-off state
Core Design Contradiction:
ProductivityVSReliability

Solution Approach 1:

The patent prepares the chip for independent power-off operation by pre-loading a first image into the non-volatile memory during the power-on state. This first image contains all necessary instructions and configuration for autonomous operation. When the host powers off, the chip seamlessly transitions to executing the first image without requiring host support, thereby achieving both high processing capability when needed and independent operation when the host is unavailable.

Inventive Principle:
Principle #10Preliminary action

Data Source

PatentUS20250321748A1Chip boot method, chip, electronic device, and readable storage medium
Publication Date: 2025.10.16 HUAWEI TECH CO LTD
  • US20250321748A1 patent drawing
  • US20250321748A1 patent drawing
  • US20250321748A1 patent drawing

AI summary

This application provides a chip boot method, a chip, an electronic device, and a readable storage medium. In the method, when a chip is booted, whether a first image needs to be burnt in a non-volatile memory is detected, where the first image is an image that is run by the chip when an electronic device is in a power-off state; and different boot operations are performed based on a status of the electronic device and a result of whether the first image needs to be burnt in the non-volatile memory, where the status of the electronic device includes a power-on state and the power-off state.