Dual Storage Interline CCD for Reduced Frame Capture Delay
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Solution Overview
Problem
Conventional interline charge-coupled device (CCD) image sensors face delays between capturing and reading out image frames, leading to errors and artifacts, particularly in Time of Flight (TOF) applications where scene changes occur between exposures.
Innovation Solution
The implementation of a dual vertical CCD structure with two sets of storage units for each photodetecting element allows simultaneous or overlapping read-out of one image frame while capturing another, reducing the delay between captures and increasing frame rate.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If a conventional interline CCD structure with single storage unit is used, then device complexity is low, but read-out delay increases and frame rate decreases
Solution Approach 1:
The patent divides the storage function into multiple separate storage units (first storage unit and second storage unit) for each photodetecting element. This segmentation allows independent operation of each storage unit, enabling one to be read out while the other accumulates charge, thereby increasing frame rate without proportionally increasing overall device complexity
Solution Approach 2:
The patent introduces a temporal dimension to the storage unit operation by alternating between reading out the first storage unit and accumulating charge in the second storage unit. This dimensional approach to time-managed storage enables overlapping read-out and acquisition operations, resolving the contradiction between frame rate and structural complexity
2Loss of time
If sequential read-out of image frames is used, then device complexity is low, but time delay between captures increases
Solution Approach 1:
The patent implements preliminary action by pre-positioning charge in the first storage unit before initiating the read-out operation. The second storage unit is prepared in advance to receive charge during the read-out period, ensuring continuous operation without time delay while maintaining manageable device complexity through structured charge transfer sequencing
Solution Approach 2:
The patent ensures continuity of useful action by maintaining overlapping operations where the first storage unit is being read out while the second storage unit simultaneously accumulates charge. This continuous operation eliminates idle time between captures and minimizes time delay, achieved through a systematic dual-storage-unit configuration that balances performance and complexity
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach minimizes errors and artifacts by allowing continuous image capture with minimal delay between frames, enhancing the performance of interline CCD sensors in TOF applications.
Implementation Method 1
a plurality of photodetecting, or photosensitive, elements such, as e.g. photodiodes, configured to convert light incident thereon into electrical charge
Implementation Method 2
A CCD is a device for the movement of electrical charge, e.g. from an area where the charge was generated to an area where the charge can be manipulated
Data Source
AI summary
Image capturing systems with interline CCD structures designed to reduce the delay between captures of subsequent image frames are disclosed. Proposed interline CCD structures include two or more sets of storage units associated with a given set of photodetecting elements, where each photodetecting element is associated with one storage unit of each set of storage units in that the charge generated by the photodetecting element during the acquisition of a particular image frame (i.e. during a particular exposure period) may be stored any one of these storage units prior to read-out. Providing multiple sets of storage units allows read-out of charge corresponding to one image frame and stored in one set of storage units while accumulating charge corresponding to another image frame in another set of storage units, thus reducing the delay between captures of different image frames. Consequently, errors and artifacts of the image capturing system can be minimized.