Dual-Tail Voltage Comparator With Capacitive Regenerative Gain
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Solution Overview
Problem
Conventional voltage comparators face limitations in comparing a wide range of input voltages with low offset voltage and drift, high power dissipation, and reduced speed near common mode limits, especially in dual tail and strong arm topologies.
Innovation Solution
A dual tail voltage comparator circuit design that minimizes active components contributing to offset and drift, employing regenerative gain through capacitors to adjust common mode voltage and enhance gain without additional components, allowing operation over a wide input common mode range.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Extent of automation
If dual tail comparator topology is used, then the comparator can operate with clocked control, but the gain is limited and offset drift becomes significant
Solution Approach 1:
The comparator is divided into two distinct stages: a preamplifier stage that provides high gain and a latch stage that captures the comparison result. This segmentation allows the preamplifier to handle the gain requirement while the latch provides stable sampling, resolving the contradiction between clocked operation and measurement precision.
2Measurement precision
If strong arm topology is used, then the comparator provides high gain, but the number of transistors increases offset and offset drift
Solution Approach 1:
The high gain function is extracted from the main comparator circuit and placed in a dedicated preamplifier stage. This allows the main latch stage to use fewer transistors, reducing the random offset component and offset drift while maintaining high overall gain through the preamplifier.
3Device complexity
If conventional comparator topologies are used, then the circuit structure is simple, but the common mode input range is limited
Solution Approach 1:
The preamplifier stage uses dynamic operation with clocked control to adjust its operating point, allowing it to accommodate a wide common mode input range. The dynamic biasing and clocked operation enable the circuit to maintain proper functionality across varying input common mode voltages while keeping the overall structure relatively simple.
Data Source
AI summary
Methods and apparatuses for voltage comparators are described. In one example, a circuit for a voltage comparator includes a first transistor, a second transistor for receiving a first input voltage at a second transistor gate terminal, and a third transistor for receiving a second input voltage at a third transistor gate terminal. The second transistor and the third transistor are connected to the first transistor at a first node. A fourth transistor is connected to the second transistor at a second node, and a fifth transistor is connected to the third transistor at a third node. One or more capacitors are connected between the third node and a fourth node, where the fourth node includes the second transistor gate terminal. One or more capacitors are connected between the second node and a fifth node, where the fifth node includes the third transistor gate terminal. In one example operation, the one or more capacitors provide regenerative gain.