Dual-Thickness Metal Interconnects for Lower RC and Higher Density
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Solution Overview
Problem
Integrated circuits face challenges in achieving optimal resistance-capacitance (RC) product and interconnect density due to limitations in cross-sectional area and spacing of metal interconnects, which affect signal propagation and routing efficiency.
Innovation Solution
The implementation of dual thickness metal layers, where interconnects can have either single or double thickness, allowing for varying RC products and densities by adjusting the thickness and spacing of metal interconnects, thereby reducing capacitance and resistance, while maintaining the same footprint.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If the cross-sectional area of metal interconnects is increased to reduce resistance, then resistance decreases, but the spacing between interconnects must increase, reducing interconnect density
Solution Approach 1:
The patent introduces dual thickness metal layers, allowing interconnects to have different thicknesses (first thickness or second thickness greater than first) within the same metal layer. This vertical dimensionality change enables reduced resistance through increased thickness without requiring increased horizontal cross-sectional area, thereby maintaining interconnect spacing and density.
Solution Approach 2:
The patent applies different thicknesses to different interconnects within the same metal layer based on their specific routing requirements. Signal interconnects that require lower resistance can use the greater second thickness, while other interconnects can use the smaller first thickness, optimizing performance locally without compromising overall interconnect density.
2Reliability
If the spacing between interconnects is increased to reduce capacitance, then capacitance decreases, but the area occupied by interconnect structures increases, reducing interconnect density
Solution Approach 1:
By utilizing vertical thickness variation within the same horizontal plane, the patent reduces capacitance through increased separation in the vertical dimension (thickness) rather than requiring increased horizontal spacing. This allows interconnects to maintain close horizontal spacing for high density while achieving reduced capacitance through the dual thickness structure.
Solution Approach 2:
The patent changes the thickness parameter of metal interconnects to have two distinct values (first and second thicknesses) within the same metal layer. This parameter variation enables independent optimization of capacitance and resistance characteristics without being constrained by fixed horizontal spacing requirements.
3Speed
If dual thickness metal layers are implemented to reduce RC product, then signal propagation speed improves, but fabrication process complexity increases
Solution Approach 1:
The patent combines the formation of dual thickness metal layers into a single integrated fabrication process flow. Multiple metal layers with different thicknesses are formed using sequential deposition and selective removal steps that are merged into one coherent process, reducing the overall complexity compared to forming separate metal layers for different thickness requirements.
Solution Approach 2:
The fabrication process is segmented into distinct stages: forming initial metal layers, selectively removing portions to create thickness variations, and depositing additional metal in specific regions. This segmentation of the fabrication process enables precise control over dual thickness structures while maintaining process manageability and reducing overall complexity.
Data Source
AI summary
An apparatus includes a first metal layer, a second metal layer and a dielectric material. The first metal layer has a first thickness and a second thickness less than the first thickness, and the first metal layer comprises a first interconnect having a first thickness. The dielectric material extends between the first and second metal layers and directly contacts the first and second metal layers. The dielectric material includes a via that extends through the dielectric material. A metal material of the via directly contacts the first interconnect and the second metal layer.