Dual-Threshold Power-On Reset Circuit for Valid Memory Readout
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Solution Overview
Problem
Power-on reset (POR) circuits struggle to accurately determine when the supply voltage has reached the minimum required levels for both digital logic circuits and non-volatile memory within an integrated circuit, leading to unpredictable operation and potential premature release from reset states due to manufacturing variations and differences in voltage requirements.
Innovation Solution
A POR circuit with correlated trip points for control signals RESETZ and RELOADZ, generated using a voltage divider and bandgap reference voltage, ensures that the digital logic circuit is released from reset only when the supply voltage exceeds the minimum digital logic circuit voltage and the non-volatile memory is operational, using comparators to assert these signals based on specific voltage thresholds.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Device complexity
If a single POR circuit is used to control reset release, then the device complexity is reduced, but the reliability of voltage threshold detection deteriorates due to inability to account for different voltage requirements of digital logic and non-volatile memory
Solution Approach 1:
The POR circuit is segmented into two independent control paths: one monitoring voltage threshold for digital logic circuits (first control output) and another monitoring voltage threshold for non-volatile memory (second control output). Each segment independently evaluates its specific voltage requirement, allowing the system to handle different voltage thresholds reliably without increasing overall structural complexity.
2Productivity
If the POR circuit releases reset early to enable digital logic operation, then the productivity is improved, but the reliability deteriorates because non-volatile memory may not be operational yet
Solution Approach 1:
The POR circuit performs preliminary voltage monitoring for both digital logic and non-volatile memory during power-up. The first control output can be asserted preliminarily when digital logic voltage threshold is met, while the second control output waits for non-volatile memory voltage threshold. This allows early preparation of digital logic circuits while ensuring memory readiness before actual read transactions occur.
Solution Approach 2:
The POR circuit dynamically adapts its control signals based on real-time voltage conditions. The first control output transitions independently when digital logic voltage is sufficient, while the second control output transitions when non-volatile memory voltage is sufficient. This dynamic behavior enables optimized boot-up sequencing without compromising operational reliability.
3Reliability
If the POR circuit waits for maximum voltage stability before releasing reset, then the reliability is improved, but the loss of time increases due to extended reset duration
Solution Approach 1:
The POR circuit uses different voltage threshold parameters for different circuit blocks. Instead of waiting for a single maximum voltage stability point, the circuit detects when each block's specific voltage threshold is met. This parameter differentiation allows the system to exit reset state as soon as each subsystem is ready, reducing unnecessary wait time while maintaining accurate voltage threshold detection for reliability.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This solution ensures valid operation of both digital logic circuits and non-volatile memory by initiating read transactions only when the supply voltage is sufficiently high, addressing the complexity of varying voltage requirements and manufacturing variations, thereby ensuring reliable IC operation across different voltage levels.
Implementation Method 1
A POR circuit with correlated trip points for control signals RESETZ and RELOADZ, generated using a voltage divider and bandgap reference voltage
Implementation Method 2
using comparators to assert these signals based on specific voltage thresholds
Data Source
AI summary
An integrated circuit includes a power-on reset (POR) circuit and a digital logic circuit. The POR has first and second control outputs. The POR circuit is configured to generate a first control signal on the first control output responsive to a supply voltage on the supply voltage node exceeding a first threshold voltage and is configured to generate a second control signal on the second control output responsive to the supply voltage exceeding a second threshold voltage. The digital logic circuit has a first control input coupled to the first control output of the POR circuit and has a second control input coupled to the second control output of the POR circuit. The digital logic circuit is configured to initiate a first read transaction responsive to assertion of the first control signal and to initiate a second read transaction responsive to assertion of the second control signal.