Dual-Transistor Common Electrode Layout for Gaussian I-V Curves

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Solution Overview

Problem

Current transistors, such as FDSOI transistors, are limited in their ability to perform certain functions, particularly in low-consumption applications and memory applications, where they struggle to generate specific current-voltage features like Gaussian-type forms necessary for advanced functionalities in machine learning and memory storage.

Innovation Solution

A microelectronic device comprising two field-effect transistors with doped zones forming a common electrode, along with a dielectric layer and a rear gate, allowing for control voltages to be applied in various configurations to achieve equivalent or superior performance, enabling the generation of Gaussian-type current-voltage features.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Adaptability or versatility

If conventional transistor structures (FDSOI, Z2FET) are used, then manufacturing simplicity is maintained, but functionality and performance are limited

Engineering Contradiction:

ImprovefunctionalityVSAvoidstructure complexity

Core Design Contradiction:

Adaptability or versatilityVSDevice complexity

Solution Approach 1:

The patent merges two field-effect transistors into a single integrated structure with shared components (common source or drain region, shared dielectric layer, common rear gate) to create a dual-transistor device that provides enhanced functionality while maintaining manufacturing efficiency through consolidated structure

Inventive Principle:

Principle #5Merging (Combining)

Solution Approach 2:

The patent introduces a rear gate dimension beneath the dielectric layer, adding vertical control capability to the traditional planar transistor structure. This dimensional extension enables new functional modes and performance characteristics without significantly complicating the manufacturing process

Inventive Principle:

Principle #17Another dimension (Dimensionality change)

2Adaptability or versatility

If additional control points are added to enhance performance, then functionality improves, but device complexity increases

Engineering Contradiction:

Improvecontrol capabilityVSAvoiddevice structure

Core Design Contradiction:

Adaptability or versatilityVSDevice complexity

Solution Approach 1:

The common source or drain region serves multiple functions simultaneously: it acts as a source for one transistor, a drain for the other, and provides a shared electrical node that enables cross-coupling and interaction between the two transistors, thereby enhancing control capability without proportionally increasing complexity

Inventive Principle:

Principle #6Universality (Multi-functionality)

3Adaptability or versatility

If current conventional transistors are used, then manufacturing is simple, but ability to generate Gaussian-type current-voltage features is lacking

Engineering Contradiction:

Improvecurrent-voltage feature generationVSAvoidmanufacturing simplicity

Core Design Contradiction:

Adaptability or versatilityVSEase of manufacture

Solution Approach 1:

The patent achieves Gaussian-type current-voltage features by carefully controlling and optimizing key parameters including doping concentrations in the source and drain regions, dielectric layer thickness, rear gate voltage, and channel dimensions. These parameter adjustments enable the device to exhibit desired electrical characteristics without fundamentally changing the manufacturing process

Inventive Principle:

Principle #35Parameter changes

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This configuration allows for enhanced control over the device's electrical behavior, providing additional functionalities and enabling applications beyond current transistor capabilities, including memory and machine learning, by generating specific current-voltage features not achievable with traditional transistors.

Implementation Method 1

a first gate dielectric between the first gate and the first channel, a second gate dielectric between the second gate and the second channel

Methodology Applied

Scientific EffectElectrical insulation: Dielectric

Implementation Method 2

a first doped zone, constituting one from among the first drain and the first source, a second doped zone, constituting the other from among the first drain and the first source

Methodology Applied

Scientific EffectElectrical conduction: Conduction (electrical)

Implementation Method 3

a rear gate in contact with a lower face of the dielectric layer

Methodology Applied

Scientific EffectField effect: Electric Field

Data Source

PatentUS20240038764A1Microelectronic device with two field-effect transistors having a common electrode

Publication Date: 2024.02.01 COMMISSARIAT A LENERGIE ATOMIQUE ET AUX ENERGIES ALTERNATIVES

AI summary

A microelectronic device includes a first transistor having a first drain and a first source, a first doped zone constituting one from among the first drain and the first source, a second doped zone constituting the other from among the first drain and the first source, a second transistor comprising a second drain and a second source, a third doped zone constituting the second source or the second drain, a fourth doped zone constituting the other from among the second drain and the second source, a dielectric layer having an upper face in contact with the four doped zones and a rear gate in contact with a lower face of the dielectric layer. The second doped zone and the fourth doped zone form a common electrode.