Dual Translation Table Selection for Protected Virtual Address Regions
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Solution Overview
Problem
Existing address translation systems face inefficiencies and security challenges in managing translation table structures for secure sandboxed components, particularly in multi-processor systems, due to the need for synchronization and cooperation between different parties managing secure and less secure code, leading to increased overhead and security risks.
Innovation Solution
Implementing first and second translation table address storage circuitry, with address translation circuitry selecting between them based on whether the target virtual address is within a protected region, allowing separate translation table structures for secure and less secure regions, reducing the need for synchronization and duplication of translation entries.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If a single translation table structure is used for both secure and less secure code, then memory capacity requirements are reduced, but security risks increase and synchronization overhead is required
Solution Approach 1:
The translation table structures are segmented into multiple separate structures: a first translation table structure for secure code and a second translation table structure for less secure code. This segmentation allows each structure to be managed independently, eliminating the need for synchronization between parties while providing stronger security guarantees through isolated computing environments. The patent implements this by maintaining separate translation table structures that can be independently updated and accessed.
Solution Approach 2:
Different translation table structures are used for different regions of virtual address space based on security requirements. Protected regions of virtual address space use the first translation table structure with stronger security guarantees, while unprotected regions use the second translation table structure. This local quality approach allows the system to apply appropriate security measures only where needed, balancing security requirements with memory efficiency.
2Reliability
If separate translation table structures are used for secure and less secure regions, then security guarantees are strengthened, but memory capacity requirements increase
Solution Approach 1:
The translation table structures are segmented into multiple separate structures: a first translation table structure for secure code and a second translation table structure for less secure code. This segmentation allows each structure to be managed independently, eliminating the need for synchronization between parties while providing stronger security guarantees through isolated computing environments. The patent implements this by maintaining separate translation table structures that can be independently updated and accessed.
3Quantity of substance
If translation table structures are shared between secure and less secure code, then memory capacity is optimized, but synchronization overhead increases
Solution Approach 1:
The translation table structures are segmented into multiple separate structures: a first translation table structure for secure code and a second translation table structure for less secure code. This segmentation allows each structure to be managed independently, eliminating the need for synchronization between parties while providing stronger security guarantees through isolated computing environments. The patent implements this by maintaining separate translation table structures that can be independently updated and accessed.
Data Source
AI summary
An apparatus has address translation circuitry to translate a target virtual address (VA) specified by a memory access request into a target physical address, first/second translation table address storage circuitry to store first/second translation table addresses; and protected region defining data storage circuitry to store region defining data specifying at least one protected region of virtual address space. In response to the memory access request: when the target VA is in the protected region(s), the address translation circuitry translates the target VA based on address translation data from a first translation table structure identified by the first translation table address. When the target VA is outside the protected region(s), the target VA is translated based on address translation data from a second translation table structure identified by the second translation table address.


