Dual-Trigger MOSFET Supply Clamp for Low Leakage ESD Protection
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Solution Overview
Problem
Conventional supply clamp circuits for integrated circuits suffer from unacceptable DC leakage and transient peaks, with existing solutions being either expensive or occupying large circuit areas, necessitating a more efficient electrostatic discharge (ESD) protection mechanism.
Innovation Solution
The proposed ESD protection circuit employs a MOSFET switching circuit with distinct trigger signals for its gate and substrate terminals, utilizing resistive-capacitive detection circuits and inverter-based trigger signal conditioning to effectively manage ESD events, thereby reducing leakage and footprint.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If conventional supply clamp circuits are used for ESD protection, then ESD protection is provided, but DC leakage and transient peaks are unacceptable
Solution Approach 1:
The patent segments the trigger signal generation into two independent paths: one for the gate terminal and one for the substrate terminal. This segmentation allows independent optimization of each terminal's trigger characteristics, enabling the gate to respond to ESD events while the substrate remains controlled to minimize leakage and transient peaks.
Solution Approach 2:
The patent applies different trigger signal characteristics to different terminals: the gate receives a trigger signal with specific timing and voltage characteristics optimized for ESD detection, while the substrate receives a different trigger signal optimized for leakage reduction. This local quality differentiation resolves the contradiction between protection capability and leakage control.
2Object-generated harmful factors
If high threshold transistors or snap-back devices are used to reduce leakage, then DC leakage is reduced, but circuit area and cost increase
Solution Approach 1:
The patent changes the control parameter of the MOSFET from fixed threshold voltage (as in high threshold transistors) to dynamically controllable voltage through the substrate terminal. By varying the substrate voltage in response to ESD events, the effective threshold voltage is adjusted temporarily, reducing leakage without requiring a permanently high-threshold device that would occupy more area.
Solution Approach 2:
The substrate terminal automatically adjusts its voltage in response to ESD detection, creating a self-regulating mechanism that reduces leakage current without requiring additional external control circuits or larger device geometries. The MOSFET serves its own leakage control function through the dual-trigger mechanism.
3Reliability
If larger MOSFET devices are used for ESD protection, then ESD protection capability is improved, but circuit footprint increases
Solution Approach 1:
The patent introduces dynamic control of the MOSFET through separate gate and substrate triggering. Instead of relying on static device sizing for ESD protection, the system dynamically activates the MOSFET's protection function only when ESD events are detected, allowing smaller device dimensions while maintaining protection capability through temporal control rather than spatial scale.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The solution achieves improved ESD protection with reduced leakage and smaller MOSFET device switching circuits, maintaining similar ESD response to human body model events while saving footprint and decreasing DC leakage.
Implementation Method 1
The ESD detection circuit 42 is formed by a resistive-capacitive (RC) circuit comprising a resistor 50 connected in series with a capacitor 52 between the first and second supply lines 14 and 16
Implementation Method 2
The ESD detection circuit 42 is formed by a resistive-capacitive (RC) circuit comprising a resistor 50 connected in series with a capacitor 52
Implementation Method 3
The trigger signal conditioning circuit 44 comprises first and second inverter circuits 60 and 62, respectively, connected in series with each other
Implementation Method 4
The switching circuit 12 comprises an n-channel MOSFET device with the first conduction terminal 32 being the drain terminal, the second conduction terminal 34 being the source terminal (also connected to the transistor substrate-body terminal) and the control terminal 36 being the gate terminal
Implementation Method 5
supply clamp circuit 10 for electrostatic discharge (ESD) protection in an integrated circuit
Data Source
AI summary
Electrostatic discharge (ESD) protection is provided in using a supply clamp circuit using an ESD event actuated MOSFET device. Triggering of the MOSFET device is made at both the gate terminal and the substrate (back gate) terminal. Additionally, the MOSFET device can be formed of cascoded MOSFETs.