Dual Turret Buffer for LED Sorting Throughput
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Conventional LED sorting systems have limited throughput due to the need to halt the sorting process for wafer frame exchanges, as only one LED can be offloaded at a time and only one offloading station is practical, leading to idling time and reduced efficiency.
Innovation Solution
A dual turret buffer system with two independently movable loading regions allows simultaneous loading and unloading of LEDs onto separate output wafer frames, utilizing a polar coordinate system to enable continuous offloading and reduce wafer exchange time, thereby increasing sorting efficiency.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If a single offloading station is used in conventional sorting systems, then the system structure is simple, but the throughput is reduced due to wafer exchange time and idling
Solution Approach 1:
The buffer assembly is segmented into multiple loading regions (first loading region and second loading region) with independent receptacles. This segmentation allows different regions to perform different functions simultaneously - one region can be loading while another is unloading, eliminating the bottleneck of a single offloading station and increasing throughput without requiring a completely new system architecture
Solution Approach 2:
The patent transitions from a single-dimensional offloading approach to a multi-dimensional buffer structure with multiple loading regions arranged in space. The buffer assembly includes first and second loading regions with multiple receptacles each, enabling simultaneous loading and unloading operations at different spatial locations, effectively adding dimensional capacity to the sorting system
2Productivity
If wafer frames are exchanged sequentially at a single offloading station, then the system is easy to operate, but the sorting process is halted causing idling time
Solution Approach 1:
The buffer assembly pre-positions multiple loading regions with receptacles ready to receive and hold wafer frames. Before the sorting process needs to switch between different binning characteristics, the relevant output wafer frames are already loaded onto the buffer assembly in advance, eliminating the need to halt sorting for wafer frame exchanges and reducing idling time
Solution Approach 2:
The dual loading region buffer assembly enables continuous sorting operation by allowing the system to switch between loading regions without stopping. While one loading region is being used for sorting, another region can be prepared or exchanged, ensuring the sorting process continues uninterrupted and eliminating idle time between wafer frame changes
3Productivity
If only one output wafer frame is loaded at a time, then the system complexity is low, but the sorting process must be halted for frame removal and repositioning
Solution Approach 1:
The buffer assembly is divided into multiple independent loading regions (first and second loading regions), each capable of holding output wafer frames. This segmentation allows the system to load multiple output wafer frames simultaneously across different regions, enabling continuous sorting operations without halting for frame exchanges while maintaining manageable complexity through modular regional structure
Solution Approach 2:
The buffer assembly with multiple loading regions serves multiple functions: it can simultaneously hold multiple output wafer frames with different binning characteristics, enable continuous sorting by switching between regions, and provide flexible access to different frame types. This multi-functionality increases throughput while the modular design keeps system complexity manageable
Data Source
AI summary
A device handler for testing and sorting electronic devices has a testing station operative to test the electronic devices and to classify them according to different binning characteristics. A buffer assembly receives electronic devices which have been classified at the testing station, and the buffer assembly further comprises a first loading region having a plurality of receptacles and a second loading region having a plurality of receptacles. An output station is operative to unload electronic devices according to their different binning characteristics from either one of the first or second loading region of the buffer assembly for storage while electronic devices are being loaded onto the other loading region.