Dual Underfill Structure for Semiconductor Package Corner Cracking
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Solution Overview
Problem
As semiconductor devices undergo miniaturization, they face issues such as underfill cracking, delamination, and bump cracking due to high stress at the corners of packaged dies, which existing underfill structures fail to adequately address.
Innovation Solution
The implementation of a dual underfill structure, comprising a first underfill with a moderate coefficient of thermal expansion (CTE) and a second underfill with a lower CTE, surrounding the first underfill, to reduce stress and prevent cracking by optimizing thermal expansion mismatch and flowability.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a single underfill structure is used, then the manufacturing process is simple, but corner strain energy is high causing cracking and delamination
Solution Approach 1:
The underfill structure is divided into multiple layers: a first underfill layer with higher CTE (20-40 ppm/°C) and a second underfill layer with lower CTE (5-20 ppm/°C). This segmentation allows each layer to perform different functions - the first layer provides flowability and initial stress relief, while the second layer provides structural support and reduced thermal expansion mismatch, thereby reducing corner strain energy and preventing cracking without excessive complexity
Solution Approach 2:
The patent uses composite underfill materials with different CTE values in each layer. The first underfill layer contains materials with higher thermal expansion (20-40 ppm/°C) for better flow and adhesion, while the second underfill layer uses materials with lower thermal expansion (5-20 ppm/°C) for structural stability. This composite approach resolves the contradiction by combining materials with complementary properties to achieve both reliability and controlled complexity
2Ease of manufacture
If underfill material with high flowability is used, then filling process is easy, but corner strain energy increases leading to cracking
Solution Approach 1:
The underfill is segmented into two functional layers: the first layer has high flowability for easy filling during manufacturing, while the second layer has optimized viscosity for structural support. This segmentation allows the high-flow first layer to ease manufacturing without compromising reliability, as the second layer compensates for the strain energy that would otherwise cause cracking
Solution Approach 2:
The patent changes the CTE parameter between layers to resolve the contradiction. The first underfill layer has higher CTE (20-40 ppm/°C) providing flowability for easy manufacturing, while the second layer has lower CTE (5-20 ppm/°C) reducing thermal stress. This parameter differentiation allows easy filling while preventing crack formation through stress management
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The dual underfill structure enhances the reliability of semiconductor packages by reducing corner strain energy, preventing cracking, and ensuring robustness by effectively managing thermal expansion and flowability between the first and second underfills.
Implementation Method 1
a first underfill between the package and the package substrate, the first underfill having a first coefficient of thermal expansion (CTE); and a second underfill surrounding the first underfill, the second underfill having a second CTE less than the first CTE
Data Source
AI summary
A method for forming an underfill structure and semiconductor packages including the underfill structure are disclosed. In an embodiment, the semiconductor package may include a package including an integrated circuit die; an interposer bonded to the integrated circuit die by a plurality of die connectors; and an encapsulant surrounding the integrated circuit die. The semiconductor package may further include a package substrate bonded to the interposer by a plurality of conductive connectors; a first underfill between the package and the package substrate, the first underfill having a first coefficient of thermal expansion (CTE); and a second underfill surrounding the first underfill, the second underfill having a second CTE less than the first CTE.