Dual-VCO Clock Generator for EMI Reduction and Ripple Control
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Solution Overview
Problem
Conventional spread spectrum clock generators face challenges in reducing electromagnetic interference (EMI) while maintaining a small chip area, as increasing capacitance to address bandwidth limitations leads to increased chip size, and existing solutions fail to prevent ripple noise effectively.
Innovation Solution
A clock generator design incorporating a phase frequency detector, loop filter, voltage controlled oscillators, and modulation filters with open and closed loop structures to generate both non-spread and spread spectrum clock signals, utilizing charge pumps and dividers to manage control voltage signals and minimize EMI, while maintaining a compact chip area by optimizing resistor and capacitor values.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Speed
If the capacitance of the second capacitor (C2) is increased to solve bandwidth limitation, then the bandwidth is improved, but the chip area is increased
Solution Approach 1:
The patent changes the parameter of capacitance value to achieve the desired bandwidth. By selecting an appropriate capacitance value for C2 that satisfies the bandwidth requirement while considering chip area constraints, the patent resolves the contradiction between improving bandwidth and minimizing chip area.
2Object-generated harmful factors
If the resistance value of the first resistor (R1) is increased to reduce ripple noise, then the ripple noise is reduced, but the bandwidth is limited
Solution Approach 1:
The patent adjusts the resistance value parameter of R1 to balance between reducing ripple noise and maintaining adequate bandwidth. By optimizing this parameter within acceptable ranges, the patent achieves both noise reduction and sufficient bandwidth performance.
3Object-generated harmful factors
If a modulation filter is provided inside the closed loop clock generator, then the spread spectrum modulation is achieved, but the loop filter behaves like a high-pass filter limiting the modulation voltage signal transmission
Solution Approach 1:
The patent introduces a buffer as an intermediary component between the loop filter and the modulation filter. This buffer acts as a mediator that isolates the modulation voltage signal from the high-pass filter effect of the loop filter, enabling effective transmission of the modulation signal while maintaining spread spectrum modulation functionality for EMI reduction.
Data Source
AI summary
A clock generator including a phase frequency detector configured to compare a phase and a frequency of a reference clock signal with a phase and a frequency of a first output clock signal and generate a detection signal based on a difference in the phases and frequencies of the clock signals; a loop filter configured to generate a first control voltage signal based on the detection signal; a first voltage controlled oscillator configured to generate and output a first output clock signal based on the first control voltage signal, a modulation filter configured to generate a modulation voltage signal based on the reference clock signal and generate a second control voltage signal by combining the modulation voltage signal and the first control voltage signal, and a second voltage controlled oscillator configured to generate and output a second output clock signal based on the second control voltage signal is provided.