Dual VCO Phase Locked Loop for Multi-Band 5G
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Solution Overview
Problem
Conventional 5G communication PLLs face challenges in multi-band frequency operation due to high costs and the need for additional filters and amplifiers when using higher order harmonic frequencies, and they occupy excessive chip/module area when assembled as multiple narrow-band PLLs on a single IC or MCM.
Innovation Solution
A phase locked loop (PLL) circuit with dual voltage controlled oscillators (VCOs) that generate signals at fundamental frequencies in different frequency bands, sharing a phase frequency detector, charge pump, and low pass filter, and using a multiplexer and feedback loop to select between the VCOs, eliminating the need for additional filters and amplifiers.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If multiple narrow-band PLLs are assembled on a single IC chip or MCM to operate at multiple frequency bands, then multi-band frequency operation capability is improved, but chip/module area increases excessively
Solution Approach 1:
The patent combines multiple narrow-band PLLs into a single integrated PLL circuit that can operate across multiple frequency bands (18.5 GHz to 41.5 GHz). The design merges the functionality of separate PLLs by using a single VCO that can be tuned across wide frequency ranges and a unified feedback loop structure, thereby reducing the overall chip area while maintaining multi-band operation capability.
Solution Approach 2:
The patent creates a universal PLL circuit that can operate across multiple frequency bands by designing a VCO with wide tuning range and using frequency division mechanisms. The single PLL structure serves multiple functions by generating different frequency bands through selective frequency division, eliminating the need for separate dedicated PLLs for each band.
2Device complexity
If higher order harmonic signals are used, then the number of PLLs is reduced, but frequency range is limited to multiples of the first harmonic frequency
Solution Approach 1:
The patent implements a dynamic frequency tuning mechanism where the VCO can be continuously tuned across a wide frequency range, and the frequency division ratio can be dynamically adjusted. This allows the system to generate any frequency within the 18.5 GHz to 41.5 GHz range by combining VCO tuning with selectable frequency division, providing flexible frequency range adaptability without being constrained to fixed harmonic multiples.
Data Source
AI summary
According to one embodiment, a phase locked loop (PLL) circuit includes a first voltage controlled oscillator (VCO) to generate a first signal having a first frequency and a second VCO to generate a second signal having a second frequency. The PLL circuit includes a multiplexer coupled to the first VCO, the second VCO, and a feedback loop. The PLL circuit includes a control logic to select either the first VCO or the second VCO using the multiplexer to feed back a signal using the feedback loop, and a phase frequency detector coupled to the first VCO, the second VCO, and the feedback loop, where the phase frequency detector is configured to receive a reference signal and the feedback signal to tracking a frequency and a phase of the first or the second generated signal using the reference signal and the feedback signal.