Dual Verify Voltage Method for Phase Change Memory Cell Programming
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Solution Overview
Problem
Phase change memory cells are susceptible to disturbance during verify operations, leading to bit write errors, as the verify voltage can cause cells to drop from a reset state to a set state, especially when close to the cell's threshold voltage, increasing the probability of errors with each verify operation.
Innovation Solution
Implementing a dual verify method using two distinct verify voltages (ver_1 and ver_2) to verify the state of phase change memory cells, where ver_2 is lower than ver_1 and higher than the set state threshold voltage, to reduce the risk of disturbing cells and increase verification accuracy without significantly increasing the probability of disturbance.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If a single verify operation is performed using a voltage close to the cell's threshold voltage to verify programming state, then verification accuracy is improved, but the probability of disturbing the cell and causing bit write errors increases
Solution Approach 1:
The verification process is segmented into two distinct operations using different voltage levels. The first verify operation uses a higher voltage (closer to threshold) for accurate verification, while the second uses a lower voltage to prevent disturbance. This segmentation allows each operation to serve its specific purpose without compromising the other.
Solution Approach 2:
The first verify operation is performed as a preliminary action before the second verify operation. This preliminary verification at higher voltage ensures accurate detection of programming state, and the subsequent second verify at lower voltage confirms the state without causing disturbance, thus preventing bit write errors.
2Measurement precision
If verify voltage is increased to improve verification accuracy, then measurement precision is improved, but the harmful effect of disturbing the cell increases
Solution Approach 1:
The verification process uses two different voltage parameters instead of a single voltage level. The first verify operation uses a higher voltage parameter for accurate measurement, while the second operation uses a lower voltage parameter to minimize harmful effects. This parameter change approach allows the system to achieve both accurate verification and reduced cell disturbance.
Solution Approach 2:
The patent converts the potential harm of high-voltage verification into a benefit by using it only in the first verify operation where accurate detection is critical, followed by a low-voltage second verify operation that prevents disturbance. The harmful effect of high voltage is thus controlled and converted into a useful verification mechanism without causing data errors.
3Reliability
If multiple verify operations are performed to reduce bit write errors, then data reliability is improved, but the time and energy consumption increases
Solution Approach 1:
The patent performs two verify operations, which is more than a single verify but not an excessive number. This partial multiplication of verification operations provides sufficient reliability improvement without causing excessive time and energy consumption. The two-operation approach strikes an optimal balance between reliability and efficiency.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The dual verify method significantly reduces write bit error rates by ensuring accurate cell programming and data reliability, being more time and energy efficient than increasing the number of bits for error correction, with negligible additional circuitry requirements.
Implementation Method 1
Phase change materials can typically be electrically switched between generally amorphous and generally crystalline states
Implementation Method 2
sensing a threshold voltage of the at least one cell in response to applying a first verify voltage across the at least one cell
Data Source
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AI summary
Technology for verifying cell programming for a phase change memory array is disclosed. In an example, a method may include sending a reset pulse to a phase change memory cell. The method may further include sensing a threshold voltage of the phase change memory cell in response to applying first and second verify voltages across the phase change memory cell, where the second verify voltage is lower than the first verify voltage. The method may also include determining whether the threshold voltage of the phase change memory cell was below the first or second verify voltages.