Dual-Voltage Gate Driver Circuit for Lower IGBT Conduction Loss
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Solution Overview
Problem
Conventional gate driver circuits for power semiconductor devices face a trade-off between minimizing conduction losses and managing short-circuit currents, as higher gate-emitter voltages increase saturation voltage and desaturation current, leading to higher conduction losses and thermal stress.
Innovation Solution
A gate driver circuit with a selector circuit that dynamically switches between two voltage sources, a higher and a lower voltage, based on the input control signal's logic state, allowing for adjustable output power supply voltage to reduce saturation voltage during turn-on without compromising short-circuit current characteristics, utilizing a power supply selection circuit and a buffer stage to manage voltage levels.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Loss of energy
If a higher gate-emitter voltage is applied to reduce conduction losses, then the saturation voltage decreases and conduction losses are reduced, but the short-circuit current increases and thermal stress increases
Solution Approach 1:
The gate driver circuit dynamically switches between two voltage sources (higher and lower voltages) based on the input control signal's logic state. During normal operation, the higher voltage is applied to minimize conduction losses. During short-circuit conditions, the lower voltage is applied to limit short-circuit current. This dynamic voltage switching resolves the contradiction by adapting the gate-emitter voltage to operational conditions.
Solution Approach 2:
The invention changes the gate-emitter voltage parameter from a fixed value to a variable value that can switch between two levels. The selector circuit enables this parameter change by connecting either the higher voltage source or the lower voltage source to the gate terminal based on detected short-circuit conditions, thereby optimizing both conduction losses and short-circuit current characteristics.
2Loss of energy
If a higher gate-emitter voltage is applied to reduce conduction losses, then the saturation voltage decreases, but thermal stress increases
Solution Approach 1:
The gate driver circuit dynamically adjusts the gate-emitter voltage based on operational conditions. During normal operation, the higher voltage minimizes conduction losses. During short-circuit conditions, the lower voltage limits power dissipation and reduces thermal stress. This dynamic adjustment resolves the contradiction between reducing conduction losses and minimizing thermal stress.
3Device complexity
If a fixed power supply voltage is used, then the circuit is simple, but it cannot optimize both conduction losses and short-circuit current characteristics
Solution Approach 1:
The power supply is segmented into two separate voltage sources: a higher voltage source for normal operation and a lower voltage source for short-circuit protection. The selector circuit chooses which voltage source to connect to the gate terminal based on operational conditions. This segmentation enables optimization of both conduction losses and short-circuit current characteristics while adding minimal complexity to the circuit.
Data Source
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AI summary
A gate driver circuit (200, 400) receiving an input control signal (106) and providing a voltage at a gate terminal (102) of a semiconductor switching device (101) (e.g., an IGBT) may include: (i) a first voltage source (202) providing a first voltage; (ii) a second voltage source (109) providing a second voltage, wherein the first voltage is higher than the second voltage; and (iii) a selector circuit (203) selecting either the first voltage or the second voltage to be placed on the gate terminal (102) of the semiconductor switching device (101) based on the input control signal's logic state.