Dual Work-Function Metal Gate Nitriding Oxidation
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Solution Overview
Problem
Current semiconductor devices face challenges in achieving dual work-function metal gates without cross-diffusion and in reducing equivalent oxide thickness (EOT) while minimizing gate leakage current, due to the need for different metal materials for NMOS and PMOS devices and the limitations of conventional gate dielectric layer thickness reduction.
Innovation Solution
Performing nitriding or oxidizing treatments on the surface of the gate dielectric layer allows for the adjustment of the effective work function of the metal gate, enabling the use of a single metal gate material for both NMOS and PMOS devices and reducing EOT without increasing gate leakage.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If different metal materials are used for NMOS and PMOS gates to achieve different work functions, then the work function requirements are met, but material selection becomes more complex and cross-diffusion occurs between metal gates
Solution Approach 1:
The patent applies local quality by modifying only the surface region of the gate dielectric layer through nitriding or oxidizing treatments, while keeping the bulk dielectric material unchanged. This localized modification alters the work function of the metal gate by changing the surface properties of the dielectric layer, thereby achieving different effective work functions for NMOS and PMOS devices without requiring different metal materials throughout the entire gate structure.
Solution Approach 2:
The patent changes the physical and chemical parameters of the gate dielectric layer surface through nitriding (adding nitrogen) or oxidizing (adding oxygen) treatments. These parameter changes modify the interface properties between the dielectric layer and metal gate, thereby adjusting the effective work function. By controlling the degree and type of treatment, precise work function values can be achieved for different device types.
2Length of moving object
If physical thickness of gate dielectric layer is reduced to obtain lower EOT, then EOT is reduced, but gate leakage current increases
Solution Approach 1:
The patent changes the dielectric constant parameter of the gate dielectric layer by introducing nitrogen or oxygen into the dielectric material. This increases the dielectric constant, allowing the physical thickness to be reduced while maintaining or improving the electrical insulation performance. The modified dielectric layer provides both lower EOT and reduced gate leakage current simultaneously.
Solution Approach 2:
The patent creates a composite dielectric structure by combining the base dielectric material with nitrogen-containing or oxygen-containing compounds through thermal processing. This composite material exhibits enhanced dielectric properties, including higher dielectric constant and improved breakdown characteristics, enabling thinner gate dielectric layers with lower leakage current.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach allows for the precise setting of metal gate work functions for NMOS and PMOS devices, preventing cross-diffusion and simplifying manufacturing processes, while reducing gate leakage and achieving lower EOT.
Implementation Method 1
performing a nitriding treatment on the surface of the gate dielectric layer can reduce the effective work function of the metal gate
Implementation Method 2
performing an oxidizing treatment on the surface of the gate dielectric layer can increase the effective work function of the metal gate
Implementation Method 3
the dielectric constant of the gate dielectric layer can be increased in the case where the entire gate dielectric layer is nitrided, thereby reducing the EOT
Data Source
AI summary
A method for manufacturing a semiconductor device includes providing a semiconductor substrate, forming a high dielectric constant (high-k) gate dielectric layer on the semiconductor substrate, the high-k gate dielectric layer including a nitrided surface that has been subjected to a nitriding treatment or an oxidized surface that has been subjected to an oxidizing treatment, forming a metal gate on the nitrided surface of the high-k gate dielectric layer to form an NMOS transistor, or forming a metal gate on the oxidized surface of the high-k gate dielectric layer to form a PMOS transistor.