Dual Work Function Gate Stack for Vertical Transistor Threshold Control
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Solution Overview
Problem
The shrinking critical dimension of metal oxide semiconductor field effect transistor (MOSFET) devices makes it difficult to adjust threshold voltage through doping, limiting the range of threshold voltages and causing damage and mobility degradation due to dopant scattering.
Innovation Solution
A semiconductor device with a gate stack structure that includes P-type and N-type work function layers, allowing for independent adjustment of threshold voltages without the limitations of traditional doping methods, using a method that forms P-type and N-type work function adjustment layers on the sidewalls of semiconductor pillars to create a gate stack structure with a gate, enabling precise control of threshold voltages without damaging the device.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If doping is used to adjust threshold voltage, then threshold voltage can be adjusted, but the range of adjustment is limited and device damage occurs
Solution Approach 1:
The patent changes the material parameter (work function) of the gate electrode by selecting materials with different work functions (e.g., TiN, TaN, WN, Pt, Ir) to adjust the threshold voltage. This allows for a wider range of threshold voltage adjustment without the limitations of doping concentration, directly resolving the contradiction between adjustment precision and adjustment range.
Solution Approach 2:
The patent employs composite gate electrode structures combining multiple materials with different work functions (e.g., TiN/TaN, TiN/PT, TaN/PT) to achieve precise threshold voltage control. The composite structure allows independent optimization of each layer's contribution, enabling fine-tuned threshold voltage adjustment across a broad range while avoiding device damage.
2Manufacturing precision
If doping is used to adjust threshold voltage, then threshold voltage can be adjusted, but mobility degradation occurs due to dopant scattering
Solution Approach 1:
The patent changes the work function parameter of the gate electrode material instead of doping the channel, thereby adjusting threshold voltage without introducing dopant atoms that cause scattering. This fundamentally eliminates the mobility degradation issue while maintaining precise threshold voltage control.
Solution Approach 2:
The patent substitutes the chemical doping mechanism with a physical/electrical mechanism by using work function engineering of the gate electrode. This replacement eliminates the need for dopant atoms and their associated scattering effects, preserving carrier mobility while achieving threshold voltage adjustment.
3Manufacturing precision
If doping is used to adjust threshold voltage, then threshold voltage can be adjusted, but device damage is caused
Solution Approach 1:
The patent adjusts threshold voltage by changing the gate electrode material's work function parameter rather than introducing dopants. This approach avoids the harmful effects of doping such as crystal damage, dislocation formation, and interface degradation, thereby eliminating device damage while maintaining adjustment precision.
Solution Approach 2:
The patent replaces the mechanical/chemical process of dopant implantation with an electrical/material selection approach using work function engineering. This substitution eliminates the physical damage caused by ion implantation and thermal processing associated with doping, preserving device integrity.
Data Source
AI summary
A semiconductor device includes a substrate, a semiconductor column vertically disposed on the substrate, a first contact material layer on the substrate and in contact with a lower portion of the semiconductor column, a first insulating material layer on the first contact material layer and having an upper surface lower than an upper surface of the semiconductor column, a gate dielectric material layer on the first insulating material layer and on a portion of sidewalls of the semiconductor column while exposing an upper portion of the semiconductor column, and a gate stack structure on the gate dielectric material layer and surrounding a portion of the gate dielectric material layer on the sidewalls of the semiconductor column. The gate stack structure includes from inside to outside a P-type work function layer, an N-type work function layer, and a gate.