Dual Workfunction Metal Gate Stack for Leakage Reduction
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Solution Overview
Problem
The semiconductor industry faces challenges in scaling down MOSFET technology due to increased gate direct tunneling currents with traditional silicon dioxide gate dielectrics and polysilicon gate materials, which are mitigated by introducing high-k dielectrics and metal gate electrodes, but require complex integration schemes and tuning of workfunctions for NMOS and PMOS transistors.
Innovation Solution
A dual workfunction semiconductor device is manufactured with distinct gate stacks for NMOS and PMOS transistors, utilizing a metal gate electrode layer, barrier metal gate electrode layer, and gate dielectric capping layers to achieve different effective workfunctions, with specific materials like Al-based and lanthanide-based dielectrics and TiN or TaN to tune the workfunctions effectively.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of manufacture
If traditional silicon dioxide gate dielectric is used, then manufacturing process is simple, but gate direct tunneling currents increase exponentially when scaling down
Solution Approach 1:
The patent changes the dielectric constant parameter by transitioning from silicon dioxide (k=3.9) to high-k dielectric materials (k>3.9), enabling larger physical thickness while maintaining equivalent capacitance and reducing tunneling currents
Solution Approach 2:
The patent employs composite gate structures combining high-k dielectric materials with metal gate electrodes, creating a multi-material system that simultaneously achieves low leakage and effective capacitance
2Ease of manufacture
If polysilicon gate material is used, then manufacturing is straightforward, but polysilicon depletion effect becomes dominant for oxide thicknesses below 2 nm
Solution Approach 1:
The patent extracts and eliminates the polysilicon material from the gate structure, replacing it with metal gate materials that do not exhibit depletion effects, thereby removing the source of the reliability problem
Solution Approach 2:
The patent substitutes the semiconductor-based polysilicon gate with a metal gate system, replacing the mechanical/electrical properties of polysilicon with those of metal, which provides lower resistance and no dopant penetration
3Manufacturing precision
If different metal gate materials are used for NMOS and PMOS, then workfunction tuning is achieved, but device complexity and process integration become more difficult
Solution Approach 1:
The patent applies different dielectric capping layers with specific materials and thicknesses in different regions (NMOS vs PMOS) to achieve localized workfunction tuning while using the same metal gate material throughout
Solution Approach 2:
The patent makes a single metal gate material serve multiple functions for both NMOS and PMOS transistors, achieving dual workfunction requirements through a universal gate material combined with region-specific dielectric configurations
Data Source
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AI summary
A dual workfunction semiconductor device comprising a first gate stack and a second gate stack, having different workfunctions; wherein the first gate stack comprises a second metal electrode overlying a second dielectric capping layer, overlying a barrier metal electrode, the barrier metal electrode overlying a first metal electrode layer, overlying the dielectric host layer, the dielectric host layer overlying a first dielectric capping layer, overlying the semiconductor substrate in the first region and wherein the second gate stack comprises a second metal electrode overlying a second dielectric capping layer, overlying the first metal electrode, the first metal electrode overlying the dielectric host layer, overlying the semiconductor substrate in the second region and wherein the second metal electrode layer consists of the same metal composition as the first metal electrode layer. Also a method for forming a dual workfunction device is disclosed.