Dual-Write Pixel Circuit for High-Voltage HDR Display Driving
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Solution Overview
Problem
Display devices face challenges in achieving high resolution, supplying higher voltages to display elements, increasing frame frequency, reducing power consumption, and ensuring reliability while maintaining image quality, particularly with the introduction of 8K4K resolution and HDR displays.
Innovation Solution
The display device incorporates a novel pixel structure that allows for dual data writing and capacitive coupling, utilizing metal oxide transistors with low off-state current, and reduces the number of source and gate lines to enhance data supply and retention, enabling higher voltage supply and increased luminance with reduced power consumption.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If a source driver capable of outputting high voltage is used to supply higher voltage to display elements for clear gray-scale display, then the range of data potentials is improved, but power consumption increases
Solution Approach 1:
The pixel circuit performs preliminary action by accumulating data potentials through multiple writing operations during the data supply period. The first data is written to the storage node, then the second data is added to accumulate a higher total potential. This preliminary accumulation allows the display element to receive high voltage without requiring the source driver to continuously output high voltage, thereby reducing power consumption while maintaining the required voltage range for clear gray-scale display.
Solution Approach 2:
The patent implements periodic action through sequential data writing operations. The first data is supplied and written during an initial period, then the second data is supplied and added during a subsequent period. This periodic accumulation of data potentials allows the system to achieve high voltage levels at the display element without requiring continuous high voltage output from the source driver, thus reducing overall power consumption while maintaining the necessary voltage range.
2Device complexity
If the number of source and gate lines is reduced to simplify the pixel structure, then device complexity is reduced, but data supply capability may be compromised
Solution Approach 1:
The pixel circuit is designed with multi-functionality to compensate for the reduced number of lines. The storage node serves multiple functions: it stores the first data, accumulates the second data, and maintains the accumulated potential until the next writing operation. The transistors are configured to perform both data writing and potential accumulation functions. This universal design allows the simplified pixel structure with fewer source and gate lines to maintain adequate data supply capability while reducing overall device complexity.
Solution Approach 2:
The patent ensures continuity of useful action through the storage node that continuously holds and accumulates data potentials. After the first data is written, the storage node continuously maintains this data and adds the second data without interruption. This continuous accumulation process ensures that the reduced number of source and gate lines does not compromise data supply capability, as the storage node continuously available to receive and accumulate data from the limited number of supply lines.
3Productivity
If frame frequency is increased to display moving images more smoothly, then image quality is improved, but horizontal period becomes shorter making it difficult to increase frame frequency
Solution Approach 1:
The pixel circuit performs preliminary data accumulation during the data supply period by writing the first data and then adding the second data to the storage node. This preliminary action completes the data accumulation process before the horizontal period ends, allowing the pixel to be ready for display without requiring additional time. By performing data accumulation in advance during the available time window, the system can support higher frame frequencies while maintaining sufficient data supply capability.
Solution Approach 2:
The storage node continuously accumulates data potentials throughout the horizontal period without interruption. The first data is written and then immediately followed by the addition of the second data in a continuous process. This continuous useful action maximizes the utilization of the horizontal period, allowing the system to complete data accumulation before the period ends and thereby enabling higher frame frequencies while maintaining adequate data supply capability.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The solution provides improved image quality, increased luminance, and frame frequency while maintaining low power consumption, resulting in a highly reliable display device.
Implementation Method 1
a capacitor 104, and a circuit block 110... One electrode of the capacitor 104 is electrically connected to one of a source and a drain of the transistor 102
Implementation Method 2
a transistor 103 including a metal oxide 1530 in a channel formation region
Data Source
AI summary
A display device capable of improving image quality is provided. The display device includes a first circuit, a pixel, and a wiring. The first circuit has a function of supplying data to the wiring and a function of making the wiring floating to hold the data. The pixel has a function of taking in the data twice from the wiring and performing addition. The pixel can perform the first writing of the data in a period during which the data is supplied to the wiring, and can perform the second writing of the data in a period during which the data is held in the wiring. Therefore, by one time of data charging to a source line, a data potential larger than or equal to an output voltage of a source driver can be supplied to a display element.