Semiconductor Substrate Layout Using Dummy Areas for Mixed Device Integration
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Solution Overview
Problem
Existing methods for forming semiconductor devices with both non-volatile memory cells and logic devices on the same substrate often interfere with each other's processing steps, leading to suboptimal performance and integration challenges.
Innovation Solution
A method involving a semiconductor substrate with distinct areas for memory cells, high voltage logic devices, and low voltage logic devices, where specific recessing, insulation, and conductive layer formation techniques are used to create separate and independent structures for each device type, allowing for simultaneous fabrication without adverse effects.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If memory cells and logic devices are formed on the same substrate using conventional methods, then integration is achieved, but processing steps interfere with each other causing suboptimal performance
Solution Approach 1:
The substrate is divided into distinct first and second areas, where the first area is dedicated to memory cells and the second area is dedicated to logic devices. This spatial segmentation allows each device type to be processed independently with area-specific processing steps, preventing processing interference while maintaining substrate-level integration.
2Reliability
If area-specific processing steps are used for memory cells and logic devices, then processing interference is minimized, but additional process complexity is introduced
Solution Approach 1:
Different processing conditions and parameters are applied to different areas of the substrate. The first area receives processing steps optimized for memory cell formation, while the second area receives processing steps optimized for logic device formation. This local quality approach allows each area to have tailored processing without requiring complete process redesign.
3Ease of manufacture
If conventional integration methods are used, then manufacturing is simplified, but device performance is compromised due to processing interference
Solution Approach 1:
Area-specific processing steps are performed at predetermined stages during the fabrication sequence. By anticipating and addressing the specific processing needs of each device type at the appropriate time, the method prevents processing interference before it can affect device performance, rather than attempting to correct issues after they occur.
Data Source
AI summary
A method of forming a device on a semiconductor substrate having first, second, third and dummy areas, includes recessing the substrate upper surface in the first, second and dummy areas, forming a first conductive layer over the substrate, removing the first conductive layer from the third area and a second portion of the dummy area, forming a first insulation layer over the substrate, forming first trenches through the first insulation layer and into the substrate in the third area and the second portion of the dummy area, forming second trenches through the first insulation layer, the first conductive layer and into the substrate in the first and second areas and a first portion of the dummy area, and filling the first and second trenches with insulation material. Then, memory cells are formed in the first area, HV devices in the second area and logic devices in the third area.