Dummy Bit Line Driver for Flash Memory Noise Reduction
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Solution Overview
Problem
Flash memory devices experience reduced reliability due to noise introduced by the common source line, affecting the accuracy of read operations and data retention.
Innovation Solution
Incorporating a dummy bit line between the common source line and bit lines, with a control logic circuit and dummy bit line driver to manage voltages and minimize noise interference during read and erase operations.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a common source line is used to connect memory cells, then device complexity is reduced and ease of manufacture is improved, but noise is introduced to bit lines causing reduced reliability
Solution Approach 1:
A dummy bit line is introduced as an intermediary element between the common source line and the actual bit lines. This dummy bit line acts as a buffer that absorbs noise from the common source line, preventing it from directly affecting the signal lines used for data read operations, thereby improving read accuracy while maintaining the simple common source line architecture
2Reliability
If a dummy bit line is added between common source line and bit lines, then noise interference is reduced and reliability is improved, but device complexity and manufacturing difficulty increase
Solution Approach 1:
The bit line structure is segmented by introducing a dummy bit line that is physically separated from both the common source line and the functional bit lines. This segmentation allows the dummy bit line to independently handle noise absorption without interfering with the functional bit lines, achieving noise filtering while maintaining a relatively simple overall structure that can be manufactured using standard processes
3Reliability
If dummy bit line driver and control logic circuit are added, then noise control and reliability are improved, but device complexity and manufacturing difficulty increase
Solution Approach 1:
The dummy bit line driver and control logic circuit are designed to perform multiple functions: they control the dummy bit line during read operations to absorb noise, and during erase operations they connect the dummy bit line to the common source line to facilitate efficient erase voltage distribution. This multi-functionality reduces the need for separate dedicated circuits for each operation, simplifying the overall manufacturing process while maintaining operational stability
Data Source
AI summary
A nonvolatile memory device includes a plurality of bit lines that is connected with a plurality of cell strings, a common source line that is connected with the plurality of cell strings, at least one dummy bit line that is provided between the common source line and the plurality of bit lines, a control logic circuit that generates at least one dummy bit line driving signal in response to a command from an external device, and a dummy bit line driver that selectively provides a first voltage to the at least one dummy bit line in response to the dummy bit line driving signal.